cefc77d3151846c8f3908924cec0f4b430355878
1 # ================================== Steps to add peripherals ============
2 # Step-1: create interface declaration for the peripheral to be added.
3 # Remember these are interfaces defined for the pinmux and hence
4 # will be opposite to those defined at the peripheral.
5 # For eg. the output TX from the UART will be input (method Action)
7 # These changes will have to be done in interface_decl.py
8 # Step-2 define the wires that will be required to transfer data from the
9 # peripheral interface to the IO cell and vice-versa. Create a
10 # mkDWire for each input/output between the peripheral and the
11 # pinmux. Also create an implicit wire of GenericIOType for each cell
12 # that can be connected to a each bit from the peripheral.
13 # These changes will have to be done in wire_def.py
14 # Step-3: create the definitions for each of the methods defined above.
15 # These changes will have to be done in interface_decl.py
16 # ========================================================================
18 # default module imports
26 # project module imports
27 from interface_decl
import Interfaces
, mux_interface
, io_interface
28 from parse
import Parse
29 from actual_pinmux
import init
30 from bus_transactors
import axi4_lite
34 This BSV file has been generated by the PinMux tool available at:
35 https://bitbucket.org/casl/pinmux.
37 Authors: Neel Gala, Luke
38 Date of generation: ''' + time
.strftime("%c") + '''
41 header
= copyright
+ '''
45 Bit#(1) outputval; // output from core to pad bit7
46 Bit#(1) output_en; // output enable from core to pad bit6
47 Bit#(1) input_en; // input enable from core to io_cell bit5
48 Bit#(1) pullup_en; // pullup enable from core to io_cell bit4
49 Bit#(1) pulldown_en; // pulldown enable from core to io_cell bit3
50 Bit#(1) drivestrength; // drivestrength from core to io_cell bit2
51 Bit#(1) pushpull_en; // pushpull enable from core to io_cell bit1
52 Bit#(1) opendrain_en; // opendrain enable form core to io_cell bit0
53 } GenericIOType deriving(Eq,Bits,FShow);
62 def pinmuxgen(pth
=None, verify
=True):
63 """ populating the file with the code
66 p
= Parse(pth
, verify
)
69 ifaces
.ifaceadd('io', p
.N_IO
, io_interface
, 0)
73 bp
= os
.path
.join(pth
, bp
)
74 if not os
.path
.exists(bp
):
77 pmp
= os
.path
.join(bp
, 'pinmux.bsv')
78 ptp
= os
.path
.join(bp
, 'PinTop.bsv')
79 bvp
= os
.path
.join(bp
, 'bus.bsv')
81 # package and interface declaration followed by
82 # the generic io_cell definition
83 with
open(pmp
, "w") as bsv_file
:
84 bsv_file
.write(header
)
87 interface MuxSelectionLines;
89 // declare the method which will capture the user pin-mux
90 // selection values.The width of the input is dependent on the number
91 // of muxes happening per IO. For now we have a generalized width
92 // where each IO will have the same number of muxes.''')
94 for cell
in p
.muxed_cells
:
95 bsv_file
.write(mux_interface
.ifacefmt(cell
[0],
96 int(math
.log(len(cell
) - 1, 2))))
101 interface PeripheralSide;
102 // declare the interface to the IO cells.
103 // Each IO cell will have 8 input field (output from pin mux
104 // and on output field (input to pinmux)''')
105 # ==============================================================
107 # == create method definitions for all peripheral interfaces ==#
108 ifaces
.ifacefmt(bsv_file
)
110 # ==============================================================
112 # ===== finish interface definition and start module definition=======
116 interface Ifc_pinmux;
117 interface MuxSelectionLines mux_lines;
118 interface PeripheralSide peripheral_side;
121 module mkpinmux(Ifc_pinmux);
123 # ====================================================================
125 # ======================= create wire and registers =================#
127 // the followins wires capture the pin-mux selection
128 // values for each mux assigned to a CELL
130 for cell
in p
.muxed_cells
:
131 bsv_file
.write(mux_interface
.wirefmt(
132 cell
[0], int(math
.log(len(cell
) - 1, 2))))
134 ifaces
.wirefmt(bsv_file
)
137 # ====================================================================
138 # ========================= Actual pinmuxing ========================#
140 /*====== This where the muxing starts for each io-cell======*/
142 bsv_file
.write(p
.pinmux
)
144 /*============================================================*/
146 # ====================================================================
147 # ================= interface definitions for each method =============#
149 interface mux_lines = interface MuxSelectionLines
151 for cell
in p
.muxed_cells
:
152 bsv_file
.write(mux_interface
.ifacedef(cell
[0],
153 int(math
.log(len(cell
) - 1, 2))))
156 interface peripheral_side = interface PeripheralSide
158 ifaces
.ifacedef(bsv_file
)
159 bsv_file
.write(footer
)
160 print("BSV file successfully generated: bsv_src/pinmux.bsv")
161 # ======================================================================
163 with
open(ptp
, 'w') as bsv_file
:
164 bsv_file
.write(copyright
+ '''
167 interface Ifc_PintTop;
168 method ActionValue#(Bool) write(Bit#({0}) addr, Bit#({1}) data);
169 method Tuple2#(Bool,Bit#({1})) read(Bit#({0}) addr);
170 interface PeripheralSide peripheral_side;
173 module mkPinTop(Ifc_PintTop);
174 // instantiate the pin-mux module here
175 Ifc_pinmux pinmux <-mkpinmux;
177 // declare the registers which will be used to mux the IOs
178 '''.format(p
.ADDR_WIDTH
, p
.DATA_WIDTH
))
180 for cell
in p
.muxed_cells
:
182 Reg#(Bit#({0})) rg_muxio_{1} <-mkReg(0);'''.format(
183 int(math
.log(len(cell
) - 1, 2)), cell
[0]))
186 // rule to connect the registers to the selection lines of the
188 rule connect_selection_registers;''')
190 for cell
in p
.muxed_cells
:
192 pinmux.mux_lines.cell{0}_mux(rg_muxio_{0});'''.format(cell
[0]))
196 // method definitions for the write user interface
197 method ActionValue#(Bool) write(Bit#({2}) addr, Bit#({3}) data);
199 case (addr[{0}:{1}])'''.format(p
.upper_offset
, p
.lower_offset
,
200 p
.ADDR_WIDTH
, p
.DATA_WIDTH
))
202 for cell
in p
.muxed_cells
:
204 {0}: rg_muxio_{1}<=truncate(data);'''.format(index
, cell
[0]))
214 // method definitions for the read user interface
215 method Tuple2#(Bool,Bit#({3})) read(Bit#({2}) addr);
218 case (addr[{0}:{1}])'''.format(p
.upper_offset
, p
.lower_offset
,
219 p
.ADDR_WIDTH
, p
.DATA_WIDTH
))
221 for cell
in p
.muxed_cells
:
223 {0}: data=zeroExtend(rg_muxio_{1});'''.format(index
, cell
[0]))
229 return tuple2(err,data);
231 interface peripheral_side=pinmux.peripheral_side;
236 # ######## Generate bus transactors ################
237 with
open(bvp
, 'w') as bsv_file
:
238 bsv_file
.write(axi4_lite
.format(p
.ADDR_WIDTH
, p
.DATA_WIDTH
))
239 # ##################################################
242 print ('''pinmux_generator.py [-o outputdir] [-v|--validate] [-h|--help]
243 -o outputdir : defaults to bsv_src. also location for reading pinmux.txt
244 interfaces.txt and *.txt
245 -v | --validate : runs some validation on the pinmux
246 -h | --help : this help message
249 if __name__
== '__main__':
251 options
, remainder
= getopt
.getopt(
259 except getopt
.GetoptError
as err
:
260 print "ERROR: %s" % str(err
)
266 for opt
, arg
in options
:
267 if opt
in ('-o', '--output'):
269 elif opt
in ('-v', '--validate'):
271 elif opt
in ('-h', '--help'):
275 pinmuxgen(output_dir
, validate
)