src/soc/sv/trans/svp64.py

   1 # SPDX-License-Identifier: LGPLv3+
   2 # Copyright (C) 2021 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
   3 # Funded by NLnet http://nlnet.nl
   4
   5 """SVP64 OpenPOWER v3.0B assembly translator
   6
   7 This class takes raw svp64 assembly mnemonics (aliases excluded) and
   8 creates an EXT001-encoded "svp64 prefix" followed by a v3.0B opcode.
   9
  10 It is very simple and straightforward, the only weirdness being the
  11 extraction of the register information and conversion to v3.0B numbering.
  12 """
  13 import os, sys
  14
  15 from soc.decoder.pseudo.pagereader import ISA
  16 from soc.decoder.power_enums import get_csv, find_wiki_dir
  17
  18
  19 def is_CR_3bit(regname):
  20     return regname in ['BF', 'BFA']
  21
  22 def is_CR_5bit(regname):
  23     return regname in ['BA', 'BB', 'BC', 'BI', 'BT']
  24
  25 def is_GPR(regname):
  26     return regname in ['RA', 'RB', 'RC', 'RS', 'RT']
  27
  28
  29 class SVP64RM:
  30     def __init__(self):
  31         self.instrs = {}
  32         pth = find_wiki_dir()
  33         print (pth)
  34         for fname in os.listdir(pth):
  35             print (fname)
  36             if fname.startswith("RM"):
  37                 entries = get_csv(fname)
  38                 print (entries)
  39
  40
  41 class SVP64:
  42     def __init__(self, lst):
  43         self.lst = lst
  44         self.trans = self.translate(lst)
  45
  46     def __iter__(self):
  47         for insn in self.trans:
  48             yield insn
  49
  50     def translate(self, lst):
  51         isa = ISA() # reads the v3.0B pseudo-code markdown files
  52         res = []
  53         for insn in lst:
  54             # find first space, to get opcode
  55             ls = insn.split(' ')
  56             opcode = ls[0]
  57             # now find opcode fields
  58             fields = ''.join(ls[1:]).split(',')
  59             fields = list(map(str.strip, fields))
  60             print (opcode, fields)
  61
  62             # identify if is a svp64 mnemonic
  63             if not opcode.startswith('sv.'):
  64                 res.append(insn) # unaltered
  65                 continue
  66
  67             # start working on decoding the svp64 op: sv.baseop.vec2.mode
  68             opmodes = opcode.split(".")[1:] # strip leading "sv."
  69             v30b_op = opmodes.pop(0)        # first is the v3.0B
  70             if v30b_op not in isa.instr:
  71                 raise Exception("opcode %s of '%s' not supported" % \
  72                                 (v30b_op, insn))
  73
  74         return res
  75
  76 if __name__ == '__main__':
  77     isa = SVP64(['slw 3, 1, 4',
  78                  'extsw 5, 3',
  79                  'sv.extsw 5, 3'])
  80     csvs = SVP64RM()