src/spec/ls180.py

   1 #!/usr/bin/env python
   2 # see https://bugs.libre-soc.org/show_bug.cgi?id=304
   3
   4 from spec.base import PinSpec
   5 from parse import Parse
   6 import json
   7
   8 from spec.ifaceprint import display, display_fns, check_functions
   9 from spec.ifaceprint import display_fixed
  10 from collections import OrderedDict
  11
  12 def pinspec():
  13     pinbanks = OrderedDict((
  14         ('N', (32, 2)),
  15         ('E', (32, 2)),
  16         ('S', (32, 2)),
  17         ('W', (32, 2)),
  18     ))
  19     fixedpins = {
  20         'CTRL_SYS': [
  21             'TEST',
  22             'JTAG_SEL',
  23             'UBOOT_SEL',
  24             'NMI#',
  25             'RESET#',
  26             'CLK24M_IN',
  27             'CLK24M_OUT',
  28             'PLLTEST',
  29             'PLLREGIO',
  30             'PLLVP25',
  31             'PLLDV',
  32             'PLLVREG',
  33             'PLLGND',
  34         ],
  35         'POWER_GPIO': [
  36             'VDD_GPIOB',
  37             'GND_GPIOB',
  38         ]}
  39     fixedpins = {}
  40     function_names = {
  41                       'PWM': 'PWM (pulse-width modulation)',
  42                       'MSPI0': 'SPI Master 1 (general)',
  43                       'MSPI1': 'SPI Master 2 (SDCard)',
  44                       'UART0': 'UART (TX/RX) 1',
  45                       'SYS': 'System Control',
  46                       'GPIO': 'GPIO',
  47                       'EINT': 'External Interrupt',
  48                       'PWM': 'PWM',
  49                       'JTAG': 'JTAG',
  50                       'TWI': 'I2C Master 1',
  51                       'SD0': 'SD/MMC 1',
  52                       'SDR': 'SDRAM',
  53                       'VDD': 'Power',
  54                       'VSS': 'GND',
  55                       #'LPC1': 'Low Pincount Interface 1',
  56                       #'LPC2': 'Low Pincount Interface 2',
  57                       }
  58
  59     ps = PinSpec(pinbanks, fixedpins, function_names)
  60
  61     ps.vss("", ('N', 0), 0, 0, 1)
  62     ps.vdd("", ('N', 1), 0, 0, 1)
  63     ps.sdram1("", ('N', 2), 0, 0, 30)
  64     ps.vss("", ('N', 30), 0, 1, 1)
  65     ps.vdd("", ('N', 31), 0, 1, 1)
  66
  67     ps.vss("", ('E', 0), 0, 2, 1)
  68     ps.sdram2("", ('E', 1), 0, 0, 12)
  69     ps.vdd("", ('E', 13), 0, 2, 1)
  70     ps.gpio("", ('E', 14), 0, 8, 8)
  71     ps.vss("", ('E', 23), 0, 3, 1)
  72     ps.jtag("", ('E', 24), 0, 0, 4)
  73     ps.vdd("", ('E', 31), 0, 3, 1)
  74
  75     ps.vss("", ('S', 0), 0, 4, 1)
  76     ps.sys("", ('S', 1), 0, 0, 7)
  77     ps.vdd("", ('S', 8), 0, 4, 1)
  78     ps.i2c("", ('S', 9), 0, 0, 2)
  79     ps.mspi("0", ('S', 15), 0)
  80     ps.uart("0", ('S', 20), 0)
  81     ps.vss("", ('S', 22), 0, 5, 1)
  82     ps.gpio("", ('S', 23), 0, 0, 8)
  83     ps.vdd("", ('S', 31), 0, 5, 1)
  84
  85     ps.vss("", ('W', 0), 0, 6, 1)
  86     ps.pwm("", ('W', 1), 0, 0, 2)
  87     ps.eint("", ('W', 3), 0, 0, 3)
  88     ps.mspi("1", ('W', 6), 0)
  89     ps.vdd("", ('W', 10), 0, 6, 1)
  90     ps.sdmmc("0", ('W', 11), 0)
  91     ps.vss("", ('W', 17), 0, 7, 1)
  92     ps.vdd("", ('W', 31), 0, 7, 1)
  93     #ps.mspi("0", ('W', 8), 0)
  94     #ps.mspi("1", ('W', 8), 0)
  95
  96     #ps.mquadspi("1", ('S', 0), 0)
  97
  98     # Scenarios below can be spec'd out as either "find first interface"
  99     # by name/number e.g. SPI1, or as "find in bank/mux" which must be
 100     # spec'd as "BM:Name" where B is bank (A-F), M is Mux (0-3)
 101     # EINT and PWM are grouped together, specially, but may still be spec'd
 102     # using "BM:Name".  Pins are removed in-order as listed from
 103     # lists (interfaces, EINTs, PWMs) from available pins.
 104
 105     ls180 = ['SD0', 'UART0', 'GPIOS', 'GPIOE', 'JTAG', 'PWM', 'EINT',
 106              'VDD', 'VSS', 'SYS',
 107                 'TWI', 'MSPI0', 'MSPI1', 'SDR']
 108     ls180_eint = []
 109     ls180_pwm = []#['B0:PWM_0']
 110     descriptions = {
 111         'SD0': 'user-facing: internal (on Card), multiplexed with JTAG\n'
 112         'and UART2, for debug purposes',
 113         'TWI': 'I2C.\n',
 114         'E2:SD1': '',
 115         'MSPI1': '',
 116         'UART0': '',
 117         'LPC1': '',
 118         'SYS': '',
 119         'LPC2': '',
 120         'SDR': '',
 121         'B1:LCD/22': '18-bit RGB/TTL LCD',
 122         'ULPI0/8': 'user-facing: internal (on Card), USB-OTG ULPI PHY',
 123         'ULPI1': 'dual USB2 Host ULPI PHY'
 124     }
 125
 126     ps.add_scenario("Libre-SOC 180nm", ls180, ls180_eint, ls180_pwm,
 127                     descriptions)
 128
 129     return ps
 130
 131
 132 # map pins to litex name conventions, primarily for use in coriolis2
 133 def pinparse(pinspec):
 134     p = Parse(pinspec, verify=False)
 135
 136     print p.muxed_cells
 137     print p.muxed_cells_bank
 138
 139     ps = [''] * 32
 140     pn = [''] * 32
 141     pe = [''] * 32
 142     pw = [''] * 32
 143     pads = {'N': pn, 'S': ps, 'E': pe, 'W': pw}
 144
 145     iopads = []
 146
 147     for (padnum, name, _), bank in zip(p.muxed_cells, p.muxed_cells_bank):
 148         padnum = int(padnum)
 149         start = p.bankstart[bank]
 150         banknum = padnum - start
 151         print banknum, name, bank
 152         padbank = pads[bank]
 153         # VSS
 154         if name.startswith('vss'):
 155             #name = 'p_vssick_' + name[-1]
 156             #name = 'p_vsseck_0'
 157             #name = 'vss'
 158             name = ''
 159         # VDD
 160         elif name.startswith('vdd'):
 161             #name = 'p_vddick_' + name[-1]
 162             #name = 'p_vddeck_0'
 163             #name = 'vdd'
 164             name = ''
 165         # SYS
 166         elif name.startswith('sys'):
 167             if name == 'sys_clk':
 168                 name = 'p_sys_clk_0'
 169             elif name == 'sys_rst':
 170                 #name = 'p_sys_rst_1'
 171                 iopads.append([name, name, name])
 172                 padbank[banknum] = name
 173                 print "sys_rst add", bank, banknum, name
 174                 name = None
 175             elif name == 'sys_pllclk':
 176                 name = None # ignore
 177             elif name == 'sys_pllout':
 178                 name = 'sys_pll_48_o'
 179                 iopads.append(['p_' + name, name, name])
 180             elif name.startswith('sys_csel'):
 181                 i = name[-1]
 182                 name2 = 'sys_clksel_i(%s)' % i
 183                 name = 'p_sys_clksel_' + i
 184                 iopads.append([name, name2, name2])
 185             #if name:
 186             #    iopads.append([pname, name, name])
 187             print "sys pad", name
 188         # SPI Card
 189         elif name.startswith('mspi0') or name.startswith('mspi1'):
 190             suffix = name[6:]
 191             if suffix == 'ck':
 192                 suffix = 'clk'
 193             elif suffix == 'nss':
 194                 suffix = 'cs_n'
 195             if name.startswith('mspi1'):
 196                 prefix = 'spi_master_'
 197             else:
 198                 prefix = 'spisdcard_'
 199             name = prefix + suffix
 200             iopads.append(['p_' + name, name, name])
 201         # SD/MMC
 202         elif name.startswith('sd0'):
 203             if name.startswith('sd0_d'):
 204                 i = name[5:]
 205                 name = 'sdcard_data' + i
 206                 name2 = 'sdcard_data_%%s(%s)' % i
 207                 pad = ['p_' + name, name, name2 % 'o', name2 % 'i',
 208                             'sdcard_data_oe']
 209                 iopads.append(pad)
 210             elif name.startswith('sd0_cmd'):
 211                 name = 'sdcard_cmd'
 212                 name2 = 'sdcard_cmd_%s'
 213                 pad = ['p_' + name, name, name2 % 'o', name2 % 'i', name2 % 'oe']
 214                 iopads.append(pad)
 215             else:
 216                 name = 'sdcard_' + name[4:]
 217                 iopads.append(['p_' + name, name, name])
 218         # SDRAM
 219         elif name.startswith('sdr'):
 220             if name == 'sdr_clk':
 221                 name = 'sdram_clock'
 222                 iopads.append(['p_' + name, name, name])
 223             elif name.startswith('sdr_ad'):
 224                 i = name[6:]
 225                 name = 'sdram_a_' + i
 226                 name2 = 'sdram_a(%s)' % i
 227                 iopads.append(['p_' + name, name2, name2])
 228             elif name.startswith('sdr_ba'):
 229                 i = name[-1]
 230                 name = 'sdram_ba_' + i
 231                 name2 = 'sdram_ba(%s)' % i
 232                 iopads.append(['p_' + name, name2, name2])
 233             elif name.startswith('sdr_dqm'):
 234                 i = name[-1]
 235                 name = 'sdram_dm_' + i
 236                 name2 = 'sdram_dm(%s)' % i
 237                 iopads.append(['p_' + name, name2, name2])
 238             elif name.startswith('sdr_d'):
 239                 i = name[5:]
 240                 name = 'sdram_dq_' + i
 241                 name2 = 'sdram_dq_%%s(%s)' % i
 242                 pad = ['p_' + name, name, name2 % 'o', name2 % 'i', 'sdram_dq_oe']
 243                 iopads.append(pad)
 244             elif name == 'sdr_csn0':
 245                 name = 'sdram_cs_n'
 246                 iopads.append(['p_' + name, name, name])
 247             elif name[-1] == 'n':
 248                 name = 'sdram_' + name[4:-1] + '_n'
 249                 iopads.append(['p_' + name, name, name])
 250             else:
 251                 name = 'sdram_' + name[4:]
 252                 iopads.append(['p_' + name, name, name])
 253         # UART
 254         elif name.startswith('uart'):
 255             name = 'uart_' + name[6:]
 256             iopads.append(['p_' + name, name, name])
 257         # GPIO
 258         elif name.startswith('gpio'):
 259             i = name[7:]
 260             name = 'gpio_' + i
 261             name2 = 'gpio_%%s(%s)' % i
 262             pad = ['p_' + name, name, name2 % 'o', name2 % 'i', name2 % 'oe']
 263             print ("GPIO pad", name, pad)
 264             iopads.append(pad)
 265         # I2C
 266         elif name.startswith('twi'):
 267             name = 'i2c' + name[3:]
 268             if name.startswith('i2c_sda'):
 269                 name2 = 'i2c_sda_%s'
 270                 pad = ['p_' + name, name, name2 % 'o', name2 % 'i', name2 % 'oe']
 271                 print ("I2C pad", name, pad)
 272                 iopads.append(pad)
 273             else:
 274                 iopads.append(['p_' + name, name, name])
 275         # EINT
 276         elif name.startswith('eint'):
 277             i = name[-1]
 278             name = 'eint_%s' % i
 279             name2 = 'eint(%s)' % i
 280             pad = ['p_' + name, name2, name2]
 281             iopads.append(pad)
 282         # PWM
 283         elif name.startswith('pwm'):
 284             name = name[:-4]
 285             pad = ['p_' + name, name, name]
 286             iopads.append(pad)
 287         else:
 288             pad = ['p_' + name, name, name]
 289             iopads.append(pad)
 290             print ("GPIO pad", name, pad)
 291         if name and not name.startswith('p_'):
 292             name = 'p_' + name
 293         if name is not None:
 294             padbank[banknum] = name
 295
 296     #pw[25] = 'p_sys_rst_1'
 297     pe[13] = 'p_vddeck_0'
 298     pe[23] = 'p_vsseck_0'
 299     pw[10] = 'p_vddick_0'
 300     pw[17] = 'p_vssick_0'
 301
 302     nc_idx = 0
 303     for pl in [pe, pw, pn, ps]:
 304         for i in range(len(pl)):
 305             if pl[i] == '':
 306                 pl[i] = 'nc_%d' % nc_idx
 307                 nc_idx += 1
 308
 309     print p.bankstart
 310     print pn
 311     print ps
 312     print pe
 313     print pw
 314
 315     chip = {
 316              'pads.south'      : ps,
 317               'pads.east'       : pe,
 318               'pads.north'      : pn,
 319               'pads.west'       : pw,
 320               'pads.instances' : iopads
 321            }
 322
 323     chip = json.dumps(chip)
 324     with open("ls180/litex_pinpads.json", "w") as f:
 325         f.write(chip)
 326