src/spec/ls180.py

   1 #!/usr/bin/env python
   2 # see https://bugs.libre-soc.org/show_bug.cgi?id=304
   3
   4 from spec.base import PinSpec
   5
   6 from spec.ifaceprint import display, display_fns, check_functions
   7 from spec.ifaceprint import display_fixed
   8 from collections import OrderedDict
   9
  10 def pinspec():
  11     pinbanks = OrderedDict((
  12         ('N', (32, 2)),
  13         ('E', (32, 2)),
  14         ('S', (32, 2)),
  15         ('W', (32, 2)),
  16     ))
  17     fixedpins = {
  18         'CTRL_SYS': [
  19             'TEST',
  20             'JTAG_SEL',
  21             'UBOOT_SEL',
  22             'NMI#',
  23             'RESET#',
  24             'CLK24M_IN',
  25             'CLK24M_OUT',
  26             'PLLTEST',
  27             'PLLREGIO',
  28             'PLLVP25',
  29             'PLLDV',
  30             'PLLVREG',
  31             'PLLGND',
  32         ],
  33         'POWER_GPIO': [
  34             'VDD_GPIOB',
  35             'GND_GPIOB',
  36         ]}
  37     fixedpins = {}
  38     function_names = {
  39                       'PWM': 'PWM (pulse-width modulation)',
  40                       'MSPI2': 'SPI (Serial Peripheral Interface) Master 1',
  41                       'UART1': 'UART (TX/RX) 1',
  42                       'UART3': 'UART (TX/RX) 2',
  43                       'MMC1': 'SD/MMC 1',
  44                       'MMC2': 'SD/MMC 2',
  45                       #'LPC1': 'Low Pincount Interface 1',
  46                       #'LPC2': 'Low Pincount Interface 2',
  47                       }
  48
  49     ps = PinSpec(pinbanks, fixedpins, function_names)
  50
  51     ps.vss("", ('N', 0), 0, 0, 1)
  52     ps.vdd("", ('N', 1), 0, 0, 1)
  53     ps.sdram1("", ('N', 2), 0, 0, 30)
  54     ps.vss("", ('N', 30), 0, 0, 1)
  55     ps.vdd("", ('N', 31), 0, 0, 1)
  56
  57     ps.vss("", ('E', 0), 0, 1, 1)
  58     ps.sdram2("", ('E', 1), 0, 0, 12)
  59     ps.vdd("", ('E', 13), 0, 1, 1)
  60     ps.gpio("", ('E', 14), 0, 8, 8)
  61     ps.vss("", ('E', 23), 0, 1, 1)
  62     ps.jtag("", ('E', 24), 0, 0, 4)
  63     ps.vdd("", ('E', 31), 0, 1, 1)
  64
  65     ps.vss("", ('S', 0), 0, 1, 1)
  66     ps.clk("", ('S', 1), 0, 0, 1)
  67     ps.rst("", ('S', 2), 0, 0, 1)
  68     ps.mspi("0", ('S', 3), 0)
  69     ps.uart("0", ('S', 7), 0)
  70     ps.vdd("", ('S', 31), 0, 1, 1)
  71
  72     ps.vss("", ('W', 0), 0, 1, 1)
  73     ps.pwm("", ('W', 1), 0, 0, 2)
  74     ps.eint("", ('W', 3), 0, 0, 3)
  75     ps.mspi("1", ('W', 6), 0)
  76     ps.sdmmc("0", ('W', 10), 0)
  77     ps.vdd("", ('W', 31), 0, 1, 1)
  78     #ps.mspi("0", ('W', 8), 0)
  79     #ps.mspi("1", ('W', 8), 0)
  80
  81     #ps.mquadspi("1", ('S', 0), 0)
  82
  83     # Scenarios below can be spec'd out as either "find first interface"
  84     # by name/number e.g. SPI1, or as "find in bank/mux" which must be
  85     # spec'd as "BM:Name" where B is bank (A-F), M is Mux (0-3)
  86     # EINT and PWM are grouped together, specially, but may still be spec'd
  87     # using "BM:Name".  Pins are removed in-order as listed from
  88     # lists (interfaces, EINTs, PWMs) from available pins.
  89
  90     ls180 = ['ULPI0/8', 'ULPI1', 'MMC0', 'MMC2', 'SD0', 'UART0',
  91                 'TWI0', 'MSPI0', 'B3:SD1', ]
  92     ls180_eint = []
  93     ls180_pwm = []#['B0:PWM_0']
  94     descriptions = {
  95         'MMC': 'internal (on Card)',
  96         'SD0': 'user-facing: internal (on Card), multiplexed with JTAG\n'
  97         'and UART2, for debug purposes',
  98         'TWI2': 'I2C.\n',
  99         'E2:SD1': '',
 100         'MSPI1': '',
 101         'UART0': '',
 102         'LPC1': '',
 103         'LPC2': '',
 104         'MMC0': '',
 105         'B1:LCD/22': '18-bit RGB/TTL LCD',
 106         'ULPI0/8': 'user-facing: internal (on Card), USB-OTG ULPI PHY',
 107         'ULPI1': 'dual USB2 Host ULPI PHY'
 108     }
 109
 110     ps.add_scenario("Libre-SOC 180nm", ls180, ls180_eint, ls180_pwm,
 111                     descriptions)
 112
 113     return ps