sysdeps/loongarch/fpu_control.h

   1 /* FPU control word bits.
   2    Copyright (C) 2022 Free Software Foundation, Inc.
   3    This file is part of the GNU C Library.
   4
   5    The GNU C Library is free software; you can redistribute it and/or
   6    modify it under the terms of the GNU Lesser General Public
   7    License as published by the Free Software Foundation; either
   8    version 2.1 of the License, or (at your option) any later version.
   9
  10    The GNU C Library is distributed in the hope that it will be useful,
  11    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13    Lesser General Public License for more details.
  14
  15    You should have received a copy of the GNU Lesser General Public
  16    License along with the GNU C Library.  If not, see
  17    <https://www.gnu.org/licenses/>.  */
  18
  19 #ifndef _FPU_CONTROL_H
  20 #define _FPU_CONTROL_H
  21
  22 /* LoongArch FPU floating point control register bits.
  23  *
  24  * 31-29  -> reserved (read as 0, can not changed by software)
  25  * 28     -> cause bit for invalid exception
  26  * 27     -> cause bit for division by zero exception
  27  * 26     -> cause bit for overflow exception
  28  * 25     -> cause bit for underflow exception
  29  * 24     -> cause bit for inexact exception
  30  * 23-21  -> reserved (read as 0, can not changed by software)
  31  * 20     -> flag invalid exception
  32  * 19     -> flag division by zero exception
  33  * 18     -> flag overflow exception
  34  * 17     -> flag underflow exception
  35  * 16     -> flag inexact exception
  36  *  9-8   -> rounding control
  37  *  7-5   -> reserved (read as 0, can not changed by software)
  38  *  4     -> enable exception for invalid exception
  39  *  3     -> enable exception for division by zero exception
  40  *  2     -> enable exception for overflow exception
  41  *  1     -> enable exception for underflow exception
  42  *  0     -> enable exception for inexact exception
  43  *
  44  *
  45  * Rounding Control:
  46  * 00 - rounding ties to even (RNE)
  47  * 01 - rounding toward zero (RZ)
  48  * 10 - rounding (up) toward plus infinity (RP)
  49  * 11 - rounding (down) toward minus infinity (RM)
  50  */
  51
  52 #include <features.h>
  53
  54 /* Masks for interrupts.  */
  55 #define _FPU_MASK_V 0x10 /* Invalid operation */
  56 #define _FPU_MASK_Z 0x08 /* Division by zero  */
  57 #define _FPU_MASK_O 0x04 /* Overflow */
  58 #define _FPU_MASK_U 0x02 /* Underflow */
  59 #define _FPU_MASK_I 0x01 /* Inexact operation */
  60
  61 /* Flush denormalized numbers to zero.  */
  62 #define _FPU_FLUSH_TZ 0x1000000
  63
  64 /* Rounding control.  */
  65 #define _FPU_RC_NEAREST 0x000 /* RECOMMENDED */
  66 #define _FPU_RC_ZERO 0x100
  67 #define _FPU_RC_UP 0x200
  68 #define _FPU_RC_DOWN 0x300
  69 /* Mask for rounding control.  */
  70 #define _FPU_RC_MASK 0x300
  71
  72 #define _FPU_RESERVED 0x0
  73
  74 #define _FPU_DEFAULT 0x0
  75 #define _FPU_IEEE 0x1F
  76
  77 /* Type of the control word.  */
  78 typedef unsigned int fpu_control_t __attribute__ ((__mode__ (__SI__)));
  79
  80 /* Macros for accessing the hardware control word.  */
  81 extern fpu_control_t __loongarch_fpu_getcw (void) __THROW;
  82 extern void __loongarch_fpu_setcw (fpu_control_t) __THROW;
  83 #define _FPU_GETCW(cw) __asm__ volatile ("movfcsr2gr %0,$r0" : "=r"(cw))
  84 #define _FPU_SETCW(cw) __asm__ volatile ("movgr2fcsr $r0,%0" : : "r"(cw))
  85
  86 /* Default control word set at startup.  */
  87 extern fpu_control_t __fpu_control;
  88
  89 #endif /* fpu_control.h */