1 # This file is Copyright (c) 2019 Florent Kermarrec <florent@enjoy-digital.fr>
8 from litex
.soc
.interconnect
import csr
9 from litex
.soc
.interconnect
import csr_bus
12 def csr32_write(dut
, adr
, dat
):
14 yield from dut
.csr
.write(adr
+ 3 - i
, (dat
>> 8*i
) & 0xff)
17 def csr32_read(dut
, adr
):
20 dat |
= ((yield from dut
.csr
.read(adr
+ 3 - i
)) << 8*i
)
24 class CSRModule(Module
, csr
.AutoCSR
):
27 self
._storage
= csr
.CSRStorage(32, reset
=0x12345678, write_from_dev
=True)
28 self
._status
= csr
.CSRStatus(32, reset
=0x12345678)
32 # When csr is written:
33 # - set storage to 0xdeadbeef
34 # - set status to storage value
37 self
._storage
.we
.eq(1),
38 self
._storage
.dat_w
.eq(0xdeadbeef)
43 self
._status
.status
.eq(self
._storage
.storage
)
49 def address_map(self
, name
, memory
):
50 return {"csrmodule": 0}[name
]
53 self
.csr
= csr_bus
.Interface()
54 self
.submodules
.csrmodule
= CSRModule()
55 self
.submodules
.csrbankarray
= csr_bus
.CSRBankArray(
56 self
, self
.address_map
)
57 self
.submodules
.csrcon
= csr_bus
.Interconnect(
58 self
.csr
, self
.csrbankarray
.get_buses())
60 class TestCSR(unittest
.TestCase
):
61 def test_csr_storage(self
):
64 self
.assertEqual(hex((yield from csr32_read(dut
, 5))), hex(0x12345678))
67 yield from csr32_write(dut
, 1, 0x5a5a5a5a)
68 self
.assertEqual(hex((yield from csr32_read(dut
, 1))), hex(0x5a5a5a5a))
69 yield from csr32_write(dut
, 1, 0xa5a5a5a5)
70 self
.assertEqual(hex((yield from csr32_read(dut
, 1))), hex(0xa5a5a5a5))
72 # check update from dev
73 yield from dut
.csr
.write(0, 1)
74 self
.assertEqual(hex((yield from csr32_read(dut
, 1))), hex(0xdeadbeef))
77 run_simulation(dut
, generator(dut
))
79 def test_csr_status(self
):
82 self
.assertEqual(hex((yield from csr32_read(dut
, 1))), hex(0x12345678))
84 # check writes (no effect)
85 yield from csr32_write(dut
, 5, 0x5a5a5a5a)
86 self
.assertEqual(hex((yield from csr32_read(dut
, 5))), hex(0x12345678))
87 yield from csr32_write(dut
, 5, 0xa5a5a5a5)
88 self
.assertEqual(hex((yield from csr32_read(dut
, 5))), hex(0x12345678))
90 # check update from dev
91 yield from dut
.csr
.write(0, 1)
92 yield from dut
.csr
.write(0, 1)
93 self
.assertEqual(hex((yield from csr32_read(dut
, 5))), hex(0xdeadbeef))
96 run_simulation(dut
, generator(dut
))
98 def test_csr_fields(self
):
101 self
.assertEqual((yield dut
._storage
.fields
.foo
), 0xa)
102 self
.assertEqual((yield dut
._storage
.fields
.bar
), 0x5a)
103 self
.assertEqual((yield dut
._storage
.storage
), 0x5a000a)
106 self
.assertEqual((yield dut
._status
.fields
.foo
), 0xa)
107 self
.assertEqual((yield dut
._status
.fields
.bar
), 0x5a)
111 self
._storage
= csr
.CSRStorage(fields
=[
112 csr
.CSRField("foo", size
=4, offset
=0, reset
=0xa, description
="foo"),
113 csr
.CSRField("bar", size
=8, offset
=16, reset
=0x5a, description
="bar")
115 self
._status
= csr
.CSRStatus(fields
=[
116 csr
.CSRField("foo", size
=4, offset
=4, description
="foo"),
117 csr
.CSRField("bar", size
=8, offset
=8, description
="bar")
120 self
._status
.fields
.foo
.eq(self
._storage
.fields
.foo
),
121 self
._status
.fields
.bar
.eq(self
._storage
.fields
.bar
),
124 run_simulation(dut
, generator(dut
))