util/m5/m5op_x86.S

   1 /*
   2  * Copyright (c) 2003-2006 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Gabe Black
  29  *          Nathan Binkert
  30  *          Ali Saidi
  31  */
  32
  33 #include <gem5/asm/generic/m5ops.h>
  34
  35 /*
  36   Note: The ABI for pseudo ops using the M5OP_ADDR is defined in
  37   src/arch/x86/pseudo_inst_abi.hh. If the ABI is changed below, it's likely
  38   that the ABI in the arch directory will also need to be updated.
  39
  40   The ABI for the magic instruction-based pseudo ops is not affected by this.
  41 */
  42
  43 #if defined(M5OP_ADDR) && defined(M5OP_PIC)
  44 /* Use the memory mapped m5op interface */
  45 #define TWO_BYTE_OP(name, number)         \
  46         .globl name;                      \
  47         .func name;                       \
  48 name:                                     \
  49         mov m5_mem@gotpcrel(%rip), %r11;  \
  50         mov (%r11), %r11;                 \
  51         mov $number, %rax;                \
  52         shl $8, %rax;                     \
  53         mov 0(%r11, %rax, 1), %rax;       \
  54         ret;                              \
  55         .endfunc;
  56
  57 #elif defined(M5OP_ADDR) && !defined(M5OP_PIC)
  58 /* Use the memory mapped m5op interface */
  59 #define TWO_BYTE_OP(name, number)         \
  60         .globl name;                      \
  61         .func name;                       \
  62 name:                                     \
  63         mov m5_mem, %r11;                 \
  64         mov $number, %rax;                \
  65         shl $8, %rax;                     \
  66         mov 0(%r11, %rax, 1), %rax;       \
  67         ret;                              \
  68         .endfunc;
  69
  70 #else
  71 /* Use the magic instruction based m5op interface. This does not work
  72  * in virtualized environments.
  73  */
  74
  75 #define TWO_BYTE_OP(name, number)         \
  76         .globl name;                      \
  77         .func name;                       \
  78 name:                                     \
  79         .byte 0x0F, 0x04;                 \
  80         .word number;                     \
  81         ret;                              \
  82         .endfunc;
  83
  84 #endif
  85
  86 TWO_BYTE_OP(m5_arm, M5OP_ARM)
  87 TWO_BYTE_OP(m5_quiesce, M5OP_QUIESCE)
  88 TWO_BYTE_OP(m5_quiesce_ns, M5OP_QUIESCE_NS)
  89 TWO_BYTE_OP(m5_quiesce_cycle, M5OP_QUIESCE_CYCLE)
  90 TWO_BYTE_OP(m5_quiesce_time, M5OP_QUIESCE_TIME)
  91 TWO_BYTE_OP(m5_rpns, M5OP_RPNS)
  92 TWO_BYTE_OP(m5_wake_cpu, M5OP_WAKE_CPU)
  93 TWO_BYTE_OP(m5_exit, M5OP_EXIT)
  94 TWO_BYTE_OP(m5_fail, M5OP_FAIL)
  95 TWO_BYTE_OP(m5_init_param, M5OP_INIT_PARAM)
  96 TWO_BYTE_OP(m5_load_symbol, M5OP_LOAD_SYMBOL)
  97 TWO_BYTE_OP(m5_reset_stats, M5OP_RESET_STATS)
  98 TWO_BYTE_OP(m5_dump_stats, M5OP_DUMP_STATS)
  99 TWO_BYTE_OP(m5_dump_reset_stats, M5OP_DUMP_RESET_STATS)
 100 TWO_BYTE_OP(m5_checkpoint, M5OP_CHECKPOINT)
 101 TWO_BYTE_OP(m5_read_file, M5OP_READ_FILE)
 102 TWO_BYTE_OP(m5_write_file, M5OP_WRITE_FILE)
 103 TWO_BYTE_OP(m5_debug_break, M5OP_DEBUG_BREAK)
 104 TWO_BYTE_OP(m5_switch_cpu, M5OP_SWITCH_CPU)
 105 TWO_BYTE_OP(m5_add_symbol, M5OP_ADD_SYMBOL)
 106 TWO_BYTE_OP(m5_panic, M5OP_PANIC)
 107 TWO_BYTE_OP(m5_work_begin, M5OP_WORK_BEGIN)
 108 TWO_BYTE_OP(m5_work_end, M5OP_WORK_END)
 109 TWO_BYTE_OP(m5_dist_toggle_sync, M5OP_DIST_TOGGLE_SYNC)