wishbone_arbiter.vhdl

   1 library ieee;
   2 use ieee.std_logic_1164.all;
   3
   4 library work;
   5 use work.wishbone_types.all;
   6
   7 entity wishbone_arbiter is
   8     port (
   9         clk     : in std_ulogic;
  10         rst     : in std_ulogic;
  11
  12         wb1_in  : in wishbone_master_out;
  13         wb1_out : out wishbone_slave_out;
  14
  15         wb2_in  : in wishbone_master_out;
  16         wb2_out : out wishbone_slave_out;
  17
  18         wb_out  : out wishbone_master_out;
  19         wb_in   : in wishbone_slave_out
  20         );
  21 end wishbone_arbiter;
  22
  23 architecture behave of wishbone_arbiter is
  24     type wishbone_arbiter_state_t is (IDLE, WB1_BUSY, WB2_BUSY);
  25     signal state : wishbone_arbiter_state_t := IDLE;
  26 begin
  27     wb1_out <= wb_in when state = WB1_BUSY else wishbone_slave_out_init;
  28     wb2_out <= wb_in when state = WB2_BUSY else wishbone_slave_out_init;
  29
  30     wb_out <= wb1_in when state = WB1_BUSY else wb2_in when state = WB2_BUSY else wishbone_master_out_init;
  31
  32     wishbone_arbiter_process: process(clk)
  33     begin
  34         if rising_edge(clk) then
  35             if rst = '1' then
  36                 state <= IDLE;
  37             else
  38                 case state is
  39                     when IDLE =>
  40                         if wb1_in.cyc = '1' then
  41                             state <= WB1_BUSY;
  42                         elsif wb2_in.cyc = '1' then
  43                             state <= WB2_BUSY;
  44                         end if;
  45                     when WB1_BUSY =>
  46                         if wb1_in.cyc = '0' then
  47                             state <= IDLE;
  48                         end if;
  49                     when WB2_BUSY =>
  50                         if wb2_in.cyc = '0' then
  51                             state <= IDLE;
  52                         end if;
  53                 end case;
  54             end if;
  55         end if;
  56     end process;
  57 end behave;