# Cole Poirier

* [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=colepoirier%40gmail.com&emailassigned_to1=1&emailcc1=1&emailtype1=substring&resolution=---)

* <https://bugs.libre-soc.org/show_bug.cgi?id=325>

List of things that need more fleshed out bug reports:

* Convert hand-drawn 180nm Test ASIC's Memory Layout diagram into editable SVG <https://bugs.libre-soc.org/show_bug.cgi?id=401>
* Memory bus/L1/L2 Cache documentation  <https://bugs.libre-soc.org/show_bug.cgi?id=397>

* Bperm tutorial

* Bugseverywhere (or also <https://github.com/MichaelMure/git-bug/blob/master/bug/bug.go>)

* Competition to LS: Skywater 130nm production-ready PDK gets opensourced (<http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-June/008254.html>)

* Scoreboard documentation (<http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-June/008287.html>)

* LDST documentation (<http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-June/008287.html>)

* Follow up with graphics engineers, esp ones Yehowshua has already reached out to (<http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-June/008283.html>)