% Copyright 2024 Jacob Lifshay

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\title[Fast Big-Integer Arithmetic on SVP64 ...]{
    Fast Big-Integer Arithmetic on SVP64 at up to 256-bits/cycle and beyond
}

\author{Jacob R. Lifshay}

\date{FOSDEM 2024}

\logo{\includegraphics[height=0.5cm]{../../../images/lsoclogo.png}}

\begin{document}

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    \titlepage
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\begin{frame}[fragile]
    \frametitle{What is SVP64?}
    \begin{itemize}
        \item Vectorization Extension for PowerISA developed by \href{https://libre-soc.org}{Libre-SOC}
        \pause
        \item Basically, a way to modify nearly any PowerISA instruction to run it in a HW loop.
        \pause \\
        \medskip
        Simple Example:
        \begin{semiverbatim}
# let's assume VL was previously set to 3
sv.add *r3, *r15, r12  # adds 3 times
\pause
# expands to:
add r3, r15, r12  \only<+(1)->{# no * means r12 doesn't increment}
add r4, r16, r12  \only<+(1)->{# * means r3 and r15 increment}
add r5, r17, r12
        \end{semiverbatim}
    \end{itemize}
\end{frame}

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    \input{test.dia-tex}
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