#include "riscv_test.h"
#include "sv_test_macros.h"

RVTEST_RV64UF


# SV test: vector-vector fadd
#
# sets up x3 and x4 with data, sets VL to 2, and carries out
# an "add 1 to x3".  which actually means "add 1 to x3 *AND* add 1 to x4"

# Test code region.
RVTEST_CODE_BEGIN   # Start of test code.

        SV_FLD_DATA( f1, testdata   , 0)
        SV_FLD_DATA( f2, testdata+8 , 0)
        SV_FLD_DATA( f3, testdata+16, 0)
        SV_FLD_DATA( f4, testdata+24, 0)
        SV_FLD_DATA( f5, testdata+32, 0)
        SV_FLD_DATA( f6, testdata+40, 0)
        SV_FLD_DATA( f7, testdata+48, 0)
        SV_FLD_DATA( f8, testdata+56, 0)

        SET_SV_MVL(2)
        SET_SV_CSR(0, 2, 0, 2, 1, 0)
        SET_SV_VL(2)

        fadd.d f2, f2, f6;

        CLR_SV_CSRS()
        SET_SV_VL(0)
        SET_SV_MVL(0)

        TEST_SV_FD(0, f1, testdata+64, 0) 
        TEST_SV_FD(0, f2, testdata+72, 0) 
        TEST_SV_FD(0, f3, testdata+80, 0) 
        TEST_SV_FD(0, f4, testdata+88, 0) 

        RVTEST_PASS           # Signal success.
fail:
        RVTEST_FAIL
RVTEST_CODE_END     # End of test code.

# Input data section.
# This section is optional, and this data is NOT saved in the output.
.data
        .align 3
testdata:
        .double 1001.0
        .double 41.0
        .double 42.0
        .double 1002.0
        .double 1001.0
        .double 1.0
        .double 2.0
        .double 1002.0
        .double 1001.0
        .double 42.0
        .double 44.0
        .double 1002.0

# Output data section.
RVTEST_DATA_BEGIN   # Start of test output data region.
        .align 3
result:
        .dword -1
        .dword -1
        .dword -1
RVTEST_DATA_END     # End of test output data region.