# NL.net proposal

2022-08-

## Project name

Libre-SOC Ongoing 2022/3

## Website / wiki 

<https://libre-soc.org/nlnet_2022_ongoing>

Please be short and to the point in your answers; focus primarily on
the what and how, not so much on the why. Add longer descriptions as
attachments (see below). If English isn't your first language, don't
worry - our reviewers don't care about spelling errors, only about
great ideas. We apologise for the inconvenience of having to submit in
English. On the up side, you can be as technical as you need to be (but
you don't have to). Do stay concrete. Use plain text in your reply only,
if you need any HTML to make your point please include this as attachment.

## Abstract: Can you explain the whole project and its expected outcome(s).

# Have you been involved with projects or organisations relevant to this project before? And if so, can you tell us a bit about your contributions?

A lot! a full list is maintained here <https://libre-soc.org/nlnet_proposals/>
and includes

* the world's first FOSSHW IEEE754 Formal Correctness Proofs for fadd, fsub, and fma, with support for FP Formal Proofs added to symbiyosis;
* the world's first in-place Discrete Cosine Transform algorithm;
* Significant improvements to Europe's only silicon-proven FOSSHW VLSI toolchain (coriolis2, by LIP6 Labs of Sorbonne University)
 to do an 800,000 transistor fully automated RTL2GDSII
tape-out;
* development of a 180nm Power ISA 3.0 "Test ASIC", the largest fully FOSSHW
  ASIC ever taped-out in Europe (and funded by Horizon 2020)
* development of an Interoperability "Test API" for Power ISA systems,
  with thousands of unit tests.

and much more. The side-benefits alone for EU citizens are enormous.

# Requested Amount    

EUR 100,000.

# Explain what the requested budget will be used for? 


# Compare your own project with existing or historical efforts.

We are developing a Cray-style Scalable Vector ISA Extension for
the Supercomputing-class Power ISA.  Similar historic ISAs include
Cray Y/MP, ETA-10, Cyber CDC 205. More recent is the NEC SX Aurora.
They are all proprietary systems: Libre-SOC's efforts are entirely
FOSSHW.

## What are significant technical challenges you expect to solve during the project, if any?

## Describe the ecosystem of the project, and how you will engage with relevant actors and promote the outcomes?

We are already set to submit presentations through multiple Conferences
as has been ongoing since 2019 as can be seen at <https://libre-soc.org/conferences> and will continue to submit press releases to
OPF <https://openpowerfoundation.org/blog/libre-soc-180nm-power-isa-asic-submitted-to-imec-for-fabrication/>. Our entire development is public
so is accessible to all.

# Extra info to be submitted