# NL.net proposal ## Project name OpenPOWER ISA RFCs ## Website / wiki Please be short and to the point in your answers; focus primarily on the what and how, not so much on the why. Add longer descriptions as attachments (see below). If English isn't your first language, don't worry - our reviewers don't care about spelling errors, only about great ideas. We apologise for the inconvenience of having to submit in English. On the up side, you can be as technical as you need to be (but you don't have to). Do stay concrete. Use plain text in your reply only, if you need any HTML to make your point please include this as attachment. ## Abstract: Can you explain the whole project and its expected outcome(s). The current NLnet funding to date has allowed Libre-SOC to develop one of the most powerful Scalable Vector ISAs in the world. The 25-year-old Power ISA, developed and curated by IBM, was transferred to the OpenPOWER Foundation, and is the basis of Simple-V, the Draft Scalable Vector Extension. Simple-V *needs* to be submitted to the OPF ISA Working Group, for formal discussion and inclusion. Given that it is 380 pages we expect this to be done carefully and incrementally. https://ftp.libre-soc.org/simple_v_spec.pdf However the process of submitting Requests For Change, at the time of writing, still has not been publicly announced and opened up. We expect it to be very soon, but obviously could not begin any RFC Submission as part of the earlier NLnet funding. We will also become informed very shortly of the procedures but anticipate it to include development and submission of Compliance Test Suites (already partly covered by Simple-V unit tests, kindly funded by NLnet) as well as ongoing work on the Simulator. # Have you been involved with projects or organisations relevant to this project before? And if so, can you tell us a bit about your contributions? A lot! a full list is maintained here and includes the world's first FOSSHW IEEE754 Formal Correctness Proofs for fadd, fsub, and fma, with support for FP Formal Proofs added to symbiyosis; the world's first in-place Discrete Cosine Transform algorithm; Significant improvements to Europe's only silicon-proven FOSSHW VLSI toolchain (coriolis2, by LIP6 Labs) to do an 800,000 transistor fully automated RTL2GDSII tape-out; the side-benefits alone are enormous. # Requested Amount EUR 100,000. # Explain what the requested budget will be used for? * ongoing communication with the OpenPOWER Foundation ISA Working Group * preparation of a large number of RFCs (380 pages total so far) through the External RFC Process * for each RFC accepted, work needs to be done with IBM to submit Power ISA Spec changes * for each RFC accepted, a Compliance Test Suite must be written * for each Compliance Test Suite written the results must be confirmed correct by inspection (hence the Simulator) which has as we already discovered been quite a lot of work * Along the way we aim to continue developing the "Test API" which allows running thousands of unit tests on multiple systems and cross-checking the results. Currently we have Simulator, some "Expected Results", and the Libre-SOC HDL as well as qemu. We aim to add cavatools, gem5, Microwatt and stand-alone binary auto-generation for running on IBM POWER9 as well as Libre-SOC and Microwatt FPGAs. # Compare your own project with existing or historical efforts. We are developing a Cray-style Scalable Vector ISA Extension for the Supercomputing-class Power ISA. Similar historic ISAs include Cray YMP1, ETA-19, Cyber CDC 205. More recent is the NEC SX Aurora. They are all proprietary systems: Libre-SOC's efforts are entirely FOSSHW. Open Scalable Vector ISAs include MRISC32/64 (in early development) and RISC-V RVV. Advocates of RISC-V have been discovering to their dismay that RVV and RISC-V has fundamental issues that cannot be fixed. Additionally, submission of ISA modifications requires RISCV Foundation Membership which puts us under impossible conflict of interest with Full Transparency Conditions not only with NLnet but also with EU Auditing Requirements. By direct contrast OPF External RFC Submission does not require Secrecy. ## What are significant technical challenges you expect to solve during the project, if any? ## Describe the ecosystem of the project, and how you will engage with relevant actors and promote the outcomes? # Extra info to be submitted * TODO URLs etc