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debug: checkpoint of trying to get simulation tests working
[riscv-tests.git]
/
debug
/
programs
/
mprv.S
diff --git
a/debug/programs/mprv.S
b/debug/programs/mprv.S
index 574f32e62a562a69732dd74af4903f6bf6baa841..cc1ca54b5da24216ea2137f3831a2ef942c0a3d4 100644
(file)
--- a/
debug/programs/mprv.S
+++ b/
debug/programs/mprv.S
@@
-13,9
+13,9
@@
main:
# update mstatus
csrr t1, CSR_MSTATUS
#if XLEN == 32
# update mstatus
csrr t1, CSR_MSTATUS
#if XLEN == 32
- li t0, (MSTATUS_MPRV | (
VM
_SV32 << 24))
+ li t0, (MSTATUS_MPRV | (
SPTBR_MODE
_SV32 << 24))
#else
#else
- li t0, (MSTATUS_MPRV | (
VM
_SV39 << 24))
+ li t0, (MSTATUS_MPRV | (
SPTBR_MODE
_SV39 << 24))
#endif
#li t0, ((VM_SV39 << 24))
or t1, t0, t1
#endif
#li t0, ((VM_SV39 << 24))
or t1, t0, t1