- # Make sure writing the cycle counter causes an exception.
- TEST_CASE(10, a0, 255, li a0, 255; csrrw a0, cycle, x0);
+#ifdef __MACHINE_MODE
+ # Is F extension present?
+ csrr a0, misa
+ andi a0, a0, (1 << ('F' - 'A'))
+ beqz a0, 1f
+ # If so, make sure FP stores have no effect when mstatus.FS is off.
+ li a1, MSTATUS_FS
+ csrs mstatus, a1
+#ifdef __riscv_flen
+ fmv.s.x f0, x0
+ csrc mstatus, a1
+ la a1, fsw_data
+ TEST_CASE(10, a0, 1, fsw f0, (a1); lw a0, (a1));
+#else
+ # Fail if this test is compiled without F but executed on a core with F.
+ TEST_CASE(10, zero, 1)
+#endif
+1:
+
+ # Figure out if 'U' is set in misa
+ csrr a0, misa # a0 = csr(misa)
+ srli a0, a0, 20 # a0 = a0 >> 20
+ andi a0, a0, 1 # a0 = a0 & 1
+ beqz a0, finish # if no user mode, skip the rest of these checks
+ la t0, user_mode_end
+ srli t0, t0, PMP_SHIFT
+ csrr t1, pmpcfg0
+ csrw pmpaddr0, t0
+ csrr t1, pmpaddr0
+ bne t0, t1, fail
+ li t0, (PMP_R | PMP_W | PMP_X) # giving read, write and execute permissions
+ or t0, t0, PMP_TOR # setting mode to TOR
+ li t1, 255
+ csrrc t1, pmpcfg0, t1
+ csrrs t1, pmpcfg0, t0
+ csrr t1, pmpcfg0
+ andi t1, t1, 255
+ bne t0, t1, fail
+#endif /* __MACHINE_MODE */