+class InterfaceMultiBus(object):
+
+ def __init__(self, pins):
+ self.multibus_specs = []
+ self.nonbuspins = pins
+ self.nonb = self.add_bus(False, [], '', "xxxxxxxnofilter")
+
+ def add_bus(self, is_inout, namelist, bitspec, filterbus):
+ pins = self.nonbuspins
+ buspins = filter(lambda x: x.name_.startswith(filterbus), pins)
+ nbuspins = filter(lambda x: not x.name_.startswith(filterbus), pins)
+ self.nonbuspins = nbuspins
+ b = InterfaceBus(buspins, is_inout,
+ namelist, bitspec, filterbus)
+ print is_inout, namelist, filterbus, buspins
+ self.multibus_specs.append(b)
+ self.multibus_specs[0].pins_ = nbuspins
+ self.multibus_specs[0].nonbuspins = nbuspins
+
+ def ifacepfmt(self, *args):
+ res = ''
+ #res = Interface.ifacepfmt(self, *args)
+ for b in self.multibus_specs:
+ res += b.ifacepfmt(*args)
+ return res
+
+ def ifacedef2(self, *args):
+ res = ''
+ #res = Interface.ifacedef2(self, *args)
+ for b in self.multibus_specs:
+ res += b.ifacedef2(*args)
+ return res
+
+
+class InterfaceLCD(InterfaceBus, Interface):
+
+ def __init__(self, *args):
+ Interface.__init__(self, *args)
+ InterfaceBus.__init__(self, self.pins, False, ['data_out', None, None],
+ "Bit#({0})", "out")
+
+
+class InterfaceSDRAM(InterfaceMultiBus, Interface):
+
+ def __init__(self, ifacename, pinspecs, ganged=None, single=False):
+ Interface.__init__(self, ifacename, pinspecs, ganged, single)
+ InterfaceMultiBus.__init__(self, self.pins)
+ self.add_bus(False, ['dqm', None, None],
+ "Bit#({0})", "sdrdqm")
+ self.add_bus(True, ['d_out', 'd_out_en', 'd_in'],
+ "Bit#({0})", "sdrd")
+ self.add_bus(False, ['ad', None, None],
+ "Bit#({0})", "sdrad")
+ self.add_bus(False, ['ba', None, None],
+ "Bit#({0})", "sdrba")
+
+ def ifacedef2(self, *args):
+ return InterfaceMultiBus.ifacedef2(self, *args)
+
+
+class InterfaceFlexBus(InterfaceMultiBus, Interface):
+
+ def __init__(self, ifacename, pinspecs, ganged=None, single=False):
+ Interface.__init__(self, ifacename, pinspecs, ganged, single)
+ InterfaceMultiBus.__init__(self, self.pins)
+ self.add_bus(True, ['ad_out', 'ad_out_en', 'ad_in'],
+ "Bit#({0})", "ad")
+ self.add_bus(False, ['bwe', None, None],
+ "Bit#({0})", "bwe")
+ self.add_bus(False, ['tsiz', None, None],
+ "Bit#({0})", "tsiz")
+ self.add_bus(False, ['cs', None, None],
+ "Bit#({0})", "cs")
+
+ def ifacedef2(self, *args):
+ return InterfaceMultiBus.ifacedef2(self, *args)
+
+
+class InterfaceSD(InterfaceBus, Interface):
+
+ def __init__(self, *args):
+ Interface.__init__(self, *args)
+ InterfaceBus.__init__(self, self.pins, True, ['out', 'out_en', 'in'],
+ "Bit#({0})", "d")
+
+
+class InterfaceNSPI(InterfaceBus, Interface):
+
+ def __init__(self, *args):
+ Interface.__init__(self, *args)
+ InterfaceBus.__init__(self, self.pins, True,
+ ['io_out', 'io_out_en', 'io_in'],
+ "Bit#({0})", "io")
+
+
+class InterfaceEINT(Interface):
+ """ uses old-style (non-get/put) for now
+ """