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fix cell bit widths if muxwidth = 1
[pinmux.git]
/
src
/
bsv
/
pinmux_generator.py
diff --git
a/src/bsv/pinmux_generator.py
b/src/bsv/pinmux_generator.py
index bcc1b254cb9b0a5a5d5582fb3eb8d3bcd3057eea..64ab8851b071b8fc8bb64a945056d1fd96f4f2f0 100644
(file)
--- a/
src/bsv/pinmux_generator.py
+++ b/
src/bsv/pinmux_generator.py
@@
-190,7
+190,7
@@
def write_pmp(pmp, p, ifaces, iocells):
with open(pmp, "w") as bsv_file:
bsv_file.write(header)
with open(pmp, "w") as bsv_file:
bsv_file.write(header)
- cell_bit_width = 'Bit#(%d)' % p.cell_bitwidth
+ bwid_template = 'Bit#(%d)'
bsv_file.write('''\
(*always_ready,always_enabled*)
interface MuxSelectionLines;
bsv_file.write('''\
(*always_ready,always_enabled*)
interface MuxSelectionLines;
@@
-201,7
+201,12
@@
def write_pmp(pmp, p, ifaces, iocells):
// where each IO will have the same number of muxes.''')
for cell in p.muxed_cells:
// where each IO will have the same number of muxes.''')
for cell in p.muxed_cells:
- bsv_file.write(mux_interface.ifacefmt(cell[0], cell_bit_width))
+ cellnum = cell[0]
+ bitwidth = p.get_muxbitwidth(cellnum)
+ if bitwidth == 0:
+ continue
+ cell_bit_width = bwid_template % bitwidth
+ bsv_file.write(mux_interface.ifacefmt(cellnum, cell_bit_width))
bsv_file.write("\n endinterface\n")
bsv_file.write("\n endinterface\n")
@@
-273,8
+278,12
@@
def write_pmp(pmp, p, ifaces, iocells):
// values for each mux assigned to a CELL
''')
for cell in p.muxed_cells:
// values for each mux assigned to a CELL
''')
for cell in p.muxed_cells:
- bsv_file.write(mux_interface.wirefmt(
- cell[0], cell_bit_width))
+ cellnum = cell[0]
+ bitwidth = p.get_muxbitwidth(cellnum)
+ if bitwidth == 0:
+ continue
+ cell_bit_width = bwid_template % bitwidth
+ bsv_file.write(mux_interface.wirefmt(cellnum, cell_bit_width))
iocells.wirefmt(bsv_file)
ifaces.wirefmt(bsv_file)
iocells.wirefmt(bsv_file)
ifaces.wirefmt(bsv_file)
@@
-296,9
+305,14
@@
def write_pmp(pmp, p, ifaces, iocells):
interface mux_lines = interface MuxSelectionLines
''')
for cell in p.muxed_cells:
interface mux_lines = interface MuxSelectionLines
''')
for cell in p.muxed_cells:
+ cellnum = cell[0]
+ bitwidth = p.get_muxbitwidth(cellnum)
+ if bitwidth == 0:
+ continue
+ cell_bit_width = bwid_template % bitwidth
bsv_file.write(
mux_interface.ifacedef(
bsv_file.write(
mux_interface.ifacedef(
- cell
[0]
, cell_bit_width))
+ cell
num
, cell_bit_width))
bsv_file.write("\n endinterface;")
bsv_file.write('''
bsv_file.write("\n endinterface;")
bsv_file.write('''