+ write_instances(idef, p, ifaces)
+ write_slow(slow, slowt, slowmf, slowmt, p, ifaces, iocells)
+ write_soc(soc, soct, fastmf, fastmt, p, ifaces, iocells)
+
+
+def write_slow(slow, slowt, slowmf, slowmt, p, ifaces, iocells):
+ """ write out the slow_peripherals.bsv file.
+ joins all the peripherals together into one AXI Lite interface
+ """
+ imports = ifaces.slowimport()
+ ifdecl = ifaces.slowifdeclmux() + '\n' + ifaces.extifdecl()
+ regdef = ifaces.axi_reg_def()
+ slavedecl = ifaces.axi_slave_idx()
+ fnaddrmap = ifaces.axi_addr_map()
+ mkslow = ifaces.mkslow_peripheral()
+ mkcon = ifaces.mk_connection()
+ mkcellcon = ifaces.mk_cellconn()
+ pincon = ifaces.mk_pincon()
+ inst = ifaces.extifinstance()
+ inst2 = ifaces.extifinstance2()
+ mkplic = ifaces.mk_plic()
+ numsloirqs = ifaces.mk_sloirqsdef()
+ ifacedef = ifaces.mk_ext_ifacedef()
+ ifacedef = ifaces.mk_ext_ifacedef()
+ clockcon = ifaces.mk_slowclk_con()
+
+ with open(slow, "w") as bsv_file:
+ with open(slowt) as f:
+ slowt = f.read()
+ bsv_file.write(slowt.format(imports, ifdecl, regdef, slavedecl,
+ fnaddrmap, mkslow, mkcon, mkcellcon,
+ pincon, inst, mkplic,
+ numsloirqs, ifacedef,
+ inst2, clockcon))
+
+ with open(slowmf, "w") as bsv_file:
+ with open(slowmt) as f:
+ slowmt = f.read()
+ bsv_file.write(slowmt.format(regdef, slavedecl, fnaddrmap))
+
+
+def write_soc(soc, soct, fastmf, fastmt, p, ifaces, iocells):
+ """ write out the soc.bsv file.
+ joins all the peripherals together as AXI Masters
+ """
+ ifaces.fastbusmode = True # side-effects... shouldn't really do this
+
+ imports = ifaces.slowimport()
+ ifdecl = ifaces.fastifdecl()
+ regdef = ifaces.axi_fastmem_def()
+ slavedecl = ifaces.axi_fastslave_idx()
+ mastdecl = ifaces.axi_master_idx()
+ fnaddrmap = ifaces.axi_fastaddr_map()
+ mkfast = ifaces.mkfast_peripheral()
+ mkcon = ifaces.mk_fast_connection()
+ mkmstcon = ifaces.mk_master_connection()
+ mkcellcon = ifaces.mk_cellconn()
+ pincon = ifaces.mk_fast_pincon()
+ inst = ifaces.extfastifinstance()
+ mkplic = ifaces.mk_plic()
+ numsloirqs = ifaces.mk_sloirqsdef()
+ ifacedef = ifaces.mk_ext_ifacedef()
+ dma = ifaces.mk_dma_irq()
+ num_dmachannels = ifaces.num_dmachannels()
+ clockcon = ifaces.mk_fastclk_con()
+
+ with open(soc, "w") as bsv_file:
+ with open(soct) as f:
+ soct = f.read()
+ bsv_file.write(soct.format(imports, ifdecl, mkfast,
+ slavedecl, mastdecl, mkcon,
+ inst, dma, num_dmachannels,
+ pincon, regdef, fnaddrmap,
+ clockcon, mkmstcon,
+ ))
+
+ with open(fastmf, "w") as bsv_file:
+ with open(fastmt) as f:
+ fastmt = f.read()
+ bsv_file.write(fastmt.format(regdef, slavedecl, mastdecl, fnaddrmap))