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spi: Make memory mapped interface depth a parameter
[sifive-blocks.git]
/
src
/
main
/
scala
/
devices
/
spi
/
TLSPIFlash.scala
diff --git
a/src/main/scala/devices/spi/TLSPIFlash.scala
b/src/main/scala/devices/spi/TLSPIFlash.scala
index bfec1d154f6acf84de3522ba634c85c667cea385..e433fec05e39f94701dd1bba76532faecad2c065 100644
(file)
--- a/
src/main/scala/devices/spi/TLSPIFlash.scala
+++ b/
src/main/scala/devices/spi/TLSPIFlash.scala
@@
-11,6
+11,7
@@
import freechips.rocketchip.util.HeterogeneousBag
trait SPIFlashParamsBase extends SPIParamsBase {
val fAddress: BigInt
val fSize: BigInt
trait SPIFlashParamsBase extends SPIParamsBase {
val fAddress: BigInt
val fSize: BigInt
+ val fBufferDepth: Int
val insnAddrBytes: Int
val insnPadLenBits: Int
val insnAddrBytes: Int
val insnPadLenBits: Int
@@
-22,6
+23,7
@@
trait SPIFlashParamsBase extends SPIParamsBase {
case class SPIFlashParams(
rAddress: BigInt,
fAddress: BigInt,
case class SPIFlashParams(
rAddress: BigInt,
fAddress: BigInt,
+ fBufferDepth: Int = 0,
rSize: BigInt = 0x1000,
fSize: BigInt = 0x20000000,
rxDepth: Int = 8,
rSize: BigInt = 0x1000,
fSize: BigInt = 0x20000000,
rxDepth: Int = 8,