- def rd_csr(self, row_start):
- row_word = yield from wb_read(self.wb_bus, row_start)
- print("Returned CSR: {0:x}".format(row_word))
- return row_word
-
- # Update a single row of configuration registers
- def wr_row(self, row_addr, check=False):
- curr_gpio = row_addr * self.wordsize
- config_word = 0
- for byte in range(0, self.wordsize):
- if curr_gpio >= self.n_gpios:
- break
- config_word += self.shadow_csr[curr_gpio].packed << (8 * byte)
- #print("Reading GPIO{} shadow reg".format(curr_gpio))
- curr_gpio += 1
- print("Writing shadow CSRs val {0:x} to row addr {1:x}"
- .format(config_word, row_addr))
- yield from wb_write(self.wb_bus, row_addr, config_word)
- yield # Allow one clk cycle to propagate
-
- if(check):
- read_word = yield from self.rd_row(row_addr)
- assert config_word == read_word
-
- # Read a single address row of GPIO CSRs, and update shadow
- def rd_row(self, row_addr):
- read_word = yield from self.rd_csr(row_addr)
- curr_gpio = row_addr * self.wordsize
- single_csr = 0
- for byte in range(0, self.wordsize):
- if curr_gpio >= self.n_gpios:
- break
- single_csr = (read_word >> (8 * byte)) & 0xFF
- #print("Updating GPIO{0} shadow reg to {1:x}"
- # .format(curr_gpio, single_csr))
- self.update_single_shadow(single_csr, curr_gpio)
- curr_gpio += 1
- return read_word
+ # Update multiple configuration registers
+ def wr(self, gp_start, gp_end, check=False):
+ # Some maths to determine how many transactions, and at which
+ # address to start transmitting
+ n_gp_config = gp_end - gp_start
+ adr_start = gp_start // self.n_gp_per_adr
+ n_adr = ceil(n_gp_config / self.n_gp_per_adr)
+
+ curr_gpio = gp_start
+ # cycle through addresses, each iteration is a WB tx
+ for adr in range(adr_start, adr_start + n_adr):
+ tx_sel = 0
+ tx_word = 0
+ # cycle through every WB sel bit, and add configs of
+ # corresponding gpios
+ for i in range(0, self.n_gp_per_adr):
+ # if current gpio's location in the WB data word matches sel bit
+ if (curr_gpio % self.n_gp_per_adr) == i:
+ print("gpio%d" % curr_gpio)
+ tx_sel += 1 << i
+ tx_word += (self.shadow_csr[curr_gpio].packed
+ << (self.granuality * i))
+ curr_gpio += 1
+ # stop if we processed all required gpios
+ if curr_gpio >= gp_end:
+ break
+ print("Adr: %x | Sel: %x | TX Word: %x" % (adr, tx_sel, tx_word))
+ yield from wb_write(self.wb_bus, adr, tx_word, tx_sel)
+ yield # Allow one clk cycle to propagate
+
+ if(check):
+ row_word = yield from wb_read(self.wb_bus, adr, tx_sel)
+ assert config_word == read_word
+
+ def rd(self, gp_start, gp_end):
+ # Some maths to determine how many transactions, and at which
+ # address to start transmitting
+ n_gp_config = gp_end - gp_start
+ adr_start = gp_start // self.n_gp_per_adr
+ n_adr = ceil(n_gp_config / self.n_gp_per_adr)
+
+ curr_gpio = gp_start
+ # cycle through addresses, each iteration is a WB tx
+ for adr in range(adr_start, adr_start + n_adr):
+ tx_sel = 0
+ # cycle through every WB sel bit, and add configs of
+ # corresponding gpios
+ for i in range(0, self.n_gp_per_adr):
+ # if current gpio's location in the WB data word matches sel bit
+ if (curr_gpio % self.n_gp_per_adr) == i:
+ print("gpio%d" % curr_gpio)
+ tx_sel += 1 << i
+ curr_gpio += 1
+ # stop if we processed all required gpios
+ if curr_gpio >= gp_end:
+ break
+ print("Adr: %x | Sel: %x " % (adr, tx_sel))
+ row_word = yield from wb_read(self.wb_bus, adr, tx_sel)
+
+ mask = (2**self.granuality) - 1
+ for i in range(self.n_gp_per_adr):
+ if ((tx_sel >> i) & 1) == 1:
+ single_csr = (row_word >> (i*self.granuality)) & mask
+ curr_gpio = adr*self.n_gp_per_adr + i
+ #print("rd gpio%d" % curr_gpio)
+ self.update_single_shadow(single_csr, curr_gpio)