Add Tercel PHY reset synchronization

[microwatt.git] / .gitignore

diff --git a/.gitignore b/.gitignore
index 41c4fccb7a78ee4235f00c6c8b78f4af064b7e6b..0e89c7d9285c921521a0bb65578f02fb7700f9d8 100644 (file)
--- a/.gitignore
+++ b/.gitignore
@@ -2,5 +2,15 @@
 *~
 *.cf
 *.s
+*.bit
+*_out.config
+microwatt.json
+microwatt.svf
 *_tb
-simple_ram_behavioural.bin
\ No newline at end of file
+main_ram.bin
+tests/*/*.bin
+tests/*/*.hex
+tests/*/*.elf
+TAGS
+litedram/build/*
+obj_dir/*