Add Tercel PHY reset synchronization

[microwatt.git] / countzero_tb.vhdl

diff --git a/countzero_tb.vhdl b/countzero_tb.vhdl
index 21529defeb26c9a814a1c231a047849d82e1b65a..42f6048e7543d92f9490f9b8bfb204c04fc497a7 100644 (file)
--- a/countzero_tb.vhdl
+++ b/countzero_tb.vhdl
@@ -109,7 +109,6 @@ begin
             end loop;
         end loop;
 
-        assert false report "end of test" severity failure;
-        wait;
+       std.env.finish;
     end process;
 end behave;