Add Tercel PHY reset synchronization

[microwatt.git] / crhelpers.vhdl

diff --git a/crhelpers.vhdl b/crhelpers.vhdl
index f51110c32712a5047a1ba78eefac56b0a2103dae..1e6160f3ff8d54b2d766fb1671b88b6a708c4c7d 100644 (file)
--- a/crhelpers.vhdl
+++ b/crhelpers.vhdl
@@ -5,13 +5,16 @@ library work;
 use work.common.all;
 
 package crhelpers is
-    function fxm_to_num(fxm: std_ulogic_vector(7 downto 0)) return integer;
-    function num_to_fxm(num: integer) return std_ulogic_vector;
+    subtype crnum_t is integer range 0 to 7;
+    subtype crmask_t is std_ulogic_vector(7 downto 0);
+
+    function fxm_to_num(fxm: crmask_t) return crnum_t;
+    function num_to_fxm(num: crnum_t) return crmask_t;
 end package crhelpers;
 
 package body crhelpers is
 
-    function fxm_to_num(fxm: std_ulogic_vector(7 downto 0)) return integer is
+    function fxm_to_num(fxm: crmask_t) return crnum_t is
     begin
         -- If multiple fields are set (undefined), match existing
         -- hardware by returning the first one.
@@ -27,7 +30,7 @@ package body crhelpers is
         return 7;
     end;
 
-    function num_to_fxm(num: integer) return std_ulogic_vector is
+    function num_to_fxm(num: crnum_t) return crmask_t is
     begin
         case num is
             when 0 =>