Add Tercel PHY reset synchronization

[microwatt.git] / dcache_tb.vhdl

diff --git a/dcache_tb.vhdl b/dcache_tb.vhdl
index 48c6877a52c303df5cd796a7b0d06c2bcf49dd8d..1e2e07b7be13c5495d6bec3962bd2e0a1f89bb24 100644 (file)
--- a/dcache_tb.vhdl
+++ b/dcache_tb.vhdl
@@ -133,8 +133,6 @@ begin
        wait until rising_edge(clk);
        wait until rising_edge(clk);
 
-        assert false report "end of test" severity failure;
-        wait;
-
+       std.env.finish;
     end process;
 end;