Test 64-bit addressing.

[riscv-tests.git] / debug / testlib.py

diff --git a/debug/testlib.py b/debug/testlib.py
index b5bd992234cd2252a30d2018076d71614d1459a1..43b818e1d155e288d5b1bd58122ece030a7eb386 100644 (file)
--- a/debug/testlib.py
+++ b/debug/testlib.py
@@ -21,12 +21,12 @@ def find_file(path):
 def compile(args, xlen=32): # pylint: disable=redefined-builtin
     cc = os.path.expandvars("$RISCV/bin/riscv64-unknown-elf-gcc")
     cmd = [cc, "-g"]
-    if (xlen == 32):
+    if xlen == 32:
         cmd.append("-march=rv32imac")
         cmd.append("-mabi=ilp32")
     else:
         cmd.append("-march=rv64imac")
-        cmd.append("-mabi=lp64")        
+        cmd.append("-mabi=lp64")
     for arg in args:
         found = find_file(arg)
         if found:
@@ -55,35 +55,34 @@ def unused_port():
     return port
 
 class Spike(object):
-    logname = "spike.log"
+    logname = "spike-%d.log" % os.getpid()
 
-    def __init__(self, sim_cmd, binary=None, halted=False, with_jtag_gdb=True,
-            timeout=None, xlen=64):
+    def __init__(self, target, halted=False, timeout=None, with_jtag_gdb=True):
         """Launch spike. Return tuple of its process and the port it's running
         on."""
-        if sim_cmd:
-            cmd = shlex.split(sim_cmd)
+        if target.sim_cmd:
+            cmd = shlex.split(target.sim_cmd)
         else:
             spike = os.path.expandvars("$RISCV/bin/spike")
             cmd = [spike]
-        if xlen == 32:
+        if target.xlen == 32:
             cmd += ["--isa", "RV32G"]
         else:
             cmd += ["--isa", "RV64G"]
+        cmd += ["-m0x%x:0x%x" % (target.ram, target.ram_size)]
 
         if timeout:
             cmd = ["timeout", str(timeout)] + cmd
 
-        cmd += ["-m0x10000000:0x10000000"]
-
         if halted:
             cmd.append('-H')
         if with_jtag_gdb:
             cmd += ['--rbb-port', '0']
             os.environ['REMOTE_BITBANG_HOST'] = 'localhost'
-        cmd.append('programs/infinite_loop')
-        if binary:
-            cmd.append(binary)
+        self.infinite_loop = target.compile(
+                "programs/checksum.c", "programs/tiny-malloc.c",
+                "programs/infinite_loop.c", "-DDEFINE_MALLOC", "-DDEFINE_FREE")
+        cmd.append(self.infinite_loop)
         logfile = open(self.logname, "w")
         logfile.write("+ %s\n" % " ".join(cmd))
         logfile.flush()
@@ -132,6 +131,12 @@ class VcsSim(object):
                 stdout=logfile, stderr=logfile)
         done = False
         while not done:
+            # Fail if VCS exits early
+            exit_code = self.process.poll()
+            if exit_code is not None:
+                raise RuntimeError('VCS simulator exited early with status %d'
+                                   % exit_code)
+
             line = listenfile.readline()
             if not line:
                 time.sleep(1)
@@ -149,17 +154,17 @@ class VcsSim(object):
             pass
 
 class Openocd(object):
-    logname = "openocd.log"
+    logname = "openocd-%d.log" % os.getpid()
 
     def __init__(self, server_cmd=None, config=None, debug=False):
         if server_cmd:
             cmd = shlex.split(server_cmd)
         else:
-            openocd = os.path.expandvars("$RISCV/bin/riscv-openocd")
+            openocd = os.path.expandvars("$RISCV/bin/openocd")
             cmd = [openocd]
-            if (debug):
+            if debug:
                 cmd.append("-d")
-        
+
         # This command needs to come before any config scripts on the command
         # line, since they are executed in order.
         cmd += [
@@ -178,7 +183,7 @@ class Openocd(object):
         if config:
             f = find_file(config)
             if f is None:
-                print("Unable to read file " + config)
+                print "Unable to read file " + config
                 exit(1)
 
             cmd += ["-f", f]
@@ -206,6 +211,9 @@ class Openocd(object):
             if not messaged and time.time() - start > 1:
                 messaged = True
                 print "Waiting for OpenOCD to examine RISCV core..."
+            if time.time() - start > 60:
+                raise Exception("ERROR: Timed out waiting for OpenOCD to "
+                        "examine RISCV core")
 
         self.port = self._get_gdb_server_port()
 
@@ -371,9 +379,10 @@ def run_all_tests(module, target, parsed):
     gdb_cmd = parsed.gdb
 
     todo = []
-    if (parsed.misaval):
+    if parsed.misaval:
         target.misa = int(parsed.misaval, 16)
-        print "Assuming $MISA value of 0x%x. Skipping ExamineTarget." % target.misa
+        print "Assuming $MISA value of 0x%x. Skipping ExamineTarget." % \
+                target.misa
     else:
         todo.append(("ExamineTarget", ExamineTarget))
 
@@ -412,7 +421,8 @@ def add_test_run_options(parser):
     parser.add_argument("--gdb",
             help="The command to use to start gdb.")
     parser.add_argument("--misaval",
-            help="Don't run ExamineTarget, just assume the misa value which is specified.")
+            help="Don't run ExamineTarget, just assume the misa value which is "
+            "specified.")
 
 def header(title, dash='-'):
     if title:
@@ -569,7 +579,8 @@ class ExamineTarget(GdbTest):
         elif (self.target.misa >> 126) == 3:
             txt += "128"
         else:
-            txt += "??"
+            raise TestFailed("Couldn't determine XLEN from $misa (0x%x)" %
+                    self.target.misa)
 
         for i in range(26):
             if self.target.misa & (1<<i):