fetch1: Implement a simple branch target cache

[microwatt.git] / fpga / top-arty.vhdl

diff --git a/fpga/top-arty.vhdl b/fpga/top-arty.vhdl
index 8a3dc7a95a74ca64cd751dd89271cc9d7dda38db..68d1e898250bb71fa2bd87deb42add89e8466c16 100644 (file)
--- a/fpga/top-arty.vhdl
+++ b/fpga/top-arty.vhdl
@@ -15,6 +15,7 @@ entity toplevel is
         RESET_LOW          : boolean  := true;
         CLK_FREQUENCY      : positive := 100000000;
         HAS_FPU            : boolean  := true;
+        HAS_BTC            : boolean  := true;
         USE_LITEDRAM       : boolean  := false;
         NO_BRAM            : boolean  := false;
         DISABLE_FLATTEN_CORE : boolean := false;
@@ -170,6 +171,7 @@ begin
             SIM                => false,
             CLK_FREQ           => CLK_FREQUENCY,
             HAS_FPU            => HAS_FPU,
+            HAS_BTC            => HAS_BTC,
             HAS_DRAM           => USE_LITEDRAM,
             DRAM_SIZE          => 256 * 1024 * 1024,
             DRAM_INIT_SIZE     => PAYLOAD_SIZE,