fetch1: Implement a simple branch target cache

[microwatt.git] / fpga / top-generic.vhdl

diff --git a/fpga/top-generic.vhdl b/fpga/top-generic.vhdl
index d5219ff3118238754add1469d886977afaa1355b..8bff5bb6fa5362cc78480a543e151b929ae7848e 100644 (file)
--- a/fpga/top-generic.vhdl
+++ b/fpga/top-generic.vhdl
@@ -12,6 +12,7 @@ entity toplevel is
        CLK_INPUT     : positive := 100000000;
        CLK_FREQUENCY : positive := 100000000;
         HAS_FPU       : boolean  := true;
+        HAS_BTC       : boolean  := false;
         LOG_LENGTH    : natural := 512;
        DISABLE_FLATTEN_CORE : boolean := false;
         UART_IS_16550 : boolean  := true
@@ -71,6 +72,7 @@ begin
            SIM           => false,
            CLK_FREQ      => CLK_FREQUENCY,
             HAS_FPU       => HAS_FPU,
+            HAS_BTC       => HAS_BTC,
             LOG_LENGTH    => LOG_LENGTH,
            DISABLE_FLATTEN_CORE => DISABLE_FLATTEN_CORE,
             UART0_IS_16550     => UART_IS_16550