Some S-mode tests really only belong in M-mode

[riscv-tests.git] / isa / rv64mi / illegal.S

diff --git a/isa/rv64mi/illegal.S b/isa/rv64mi/illegal.S
index c5ccffde2b392885062d339a0835b7baf8f8baa4..ecb308889dac4c0269c39cabc98610ca3007f56e 100644 (file)
--- a/isa/rv64mi/illegal.S
+++ b/isa/rv64mi/illegal.S
@@ -1,8 +1,40 @@
 # See LICENSE for license details.
 
+#*****************************************************************************
+# illegal.S
+#-----------------------------------------------------------------------------
+#
+# Test illegal instruction trap.
+#
+
 #include "riscv_test.h"
-#undef RVTEST_RV64S
-#define RVTEST_RV64S RVTEST_RV64M
-#define __MACHINE_MODE
+#include "test_macros.h"
+
+RVTEST_RV64M
+RVTEST_CODE_BEGIN
+
+  li TESTNUM, 2
+  .word 0
+  j fail
+
+  j pass
+
+  TEST_PASSFAIL
+
+mtvec_handler:
+  li t1, CAUSE_ILLEGAL_INSTRUCTION
+  csrr t0, mcause
+  bne t0, t1, fail
+  csrr t0, mepc
+  addi t0, t0, 8
+  csrw mepc, t0
+  sret
+
+RVTEST_CODE_END
+
+  .data
+RVTEST_DATA_BEGIN
+
+  TEST_DATA
 
-#include "../rv64si/illegal.S"
+RVTEST_DATA_END