Make sure that code is 4-byte aligned before disabling rvc (#100)

[riscv-tests.git] / isa / rv64mi / ma_addr.S

diff --git a/isa/rv64mi/ma_addr.S b/isa/rv64mi/ma_addr.S
index 2f4d96dea9dfcbd321d8e2fa7687e21084655119..721ac6afcf708f18026578615c3985cb06a30222 100644 (file)
--- a/isa/rv64mi/ma_addr.S
+++ b/isa/rv64mi/ma_addr.S
@@ -13,6 +13,7 @@
 RVTEST_RV64M
 RVTEST_CODE_BEGIN
 
+  .align 2
   .option norvc
 
   la s0, data