#include "riscv_test.h"
#include "test_macros.h"
-RVTEST_RV64S
+RVTEST_RV64SV
RVTEST_CODE_BEGIN
- li a0, SR_EA
- csrs status, a0
-
- csrr a3,status
- li a4,(1 << IRQ_COP)
- slli a4,a4,SR_IM_SHIFT
- or a3,a3,a4 # enable IM[COP]
- csrw status,a3
-
TEST_ILLEGAL_VT_REGID(2, 5, 5, add, x7, x1, x2)
TEST_ILLEGAL_VT_REGID(3, 5, 5, add, x1, x7, x2)
TEST_ILLEGAL_VT_REGID(4, 5, 5, add, x1, x2, x7)