Remove cache miss test from all but one AMO test

[riscv-tests.git] / isa / rv64ua / amomin_w.S

diff --git a/isa/rv64ua/amomin_w.S b/isa/rv64ua/amomin_w.S
index 96b547bde3599932f9bb5fd78d7894fad0cdf4eb..1337d2ce306935021315254b69bc666f618f458e 100644 (file)
--- a/isa/rv64ua/amomin_w.S
+++ b/isa/rv64ua/amomin_w.S
@@ -46,4 +46,3 @@ RVTEST_DATA_END
   .align 3
 amo_operand:
   .dword 0
-  .skip 65536