add predicated subvl test

[riscv-tests.git] / isa / rv64ui / Makefrag.sv

diff --git a/isa/rv64ui/Makefrag.sv b/isa/rv64ui/Makefrag.sv
index c7130d03fb528d165780ac96c33374c36f30343b..8aae24bca526ade21b8dc324eb5f7b1403571daf 100644 (file)
--- a/isa/rv64ui/Makefrag.sv
+++ b/isa/rv64ui/Makefrag.sv
@@ -9,6 +9,8 @@ rv64ui_sv_tests = \
        sv_addi_vector_vector \
        sv_addi_predicated \
        sv_add_elwidth \
+       sv_addi_subvl \
+       sv_addi_predicated_subvl \
        sv_addw_elwidth \
        sv_sraw_elwidth \
        sv_ld_elwidth \