add predicated subvl test
[riscv-tests.git] / isa / rv64ui / Makefrag.sv
index eea5ac05c66dba2d6d06d8da7ea84cffbd98b335..8aae24bca526ade21b8dc324eb5f7b1403571daf 100644 (file)
@@ -9,11 +9,14 @@ rv64ui_sv_tests = \
        sv_addi_vector_vector \
        sv_addi_predicated \
        sv_add_elwidth \
+       sv_addi_subvl \
+       sv_addi_predicated_subvl \
        sv_addw_elwidth \
        sv_sraw_elwidth \
        sv_ld_elwidth \
        sv_st_elwidth \
        sv_ld_elwidth_offs \
+       sv_st_elwidth_offs \
        sv_beq \
 
 rv64ui_p_tests = $(addprefix rv64ui-p-, $(rv64ui_sv_tests))