add extra unit tests
[riscv-tests.git] / isa / rv64ui / sv_addw_elwidth.S
index 370e341fe0b438a7ecc247b2da2285c2d1ab0151..2a6c40834186681c2b7b7d758ea361103e28ab8f 100644 (file)
@@ -3,32 +3,42 @@
 
 RVTEST_RV64U        # Define TVM used by program.
 
-#define SV_ELWIDTH_TEST( wid1, wid2, wid3, expect1, expect2 ) \
+// TODO: add extra "code" argument and "testdata" argument,
+// replace "addw" with "code"
+// TODO: move SV_ELWIDTH_TEST to sv_test_macros.h
+// TODO: probably remove testing of x15 and x16 (or pass in as extra args?)
+
+#define SV_ELWIDTH_TEST( vl, wid1, wid2, wid3, isvec1, isvec2, isvec3, \
+                         expect1, expect2, expect3 ) \
                                                         \
-        SV_LDD_DATA( x4, testdata   , 0);               \
-        SV_LDD_DATA( x5, testdata+8 , 0);               \
-        SV_LDD_DATA( x12, testdata+16, 0);               \
-        SV_LDD_DATA( x13, testdata+24, 0);               \
+        SV_LDD_DATA( x12, testdata   , 0);               \
+        SV_LDD_DATA( x13, testdata+8 , 0);               \
+        SV_LDD_DATA( x14, testdata+16, 0);               \
+        SV_LDD_DATA( x15, testdata+24, 0);               \
+        SV_LDD_DATA( x16, testdata+32, 0);               \
+        SV_LDD_DATA( x17, testdata+40, 0);               \
                                                         \
-        li x14, 0xa5a5a5a5a5a5a5a5;                                      \
-        li x15, 0xa5a5a5a5a5a5a5a5;                                      \
+        li x28, 0xa5a5a5a5a5a5a5a5;                                      \
+        li x29, 0xa5a5a5a5a5a5a5a5;                                      \
+        li x30, 0xa5a5a5a5a5a5a5a5;                                      \
                                                         \
-        SET_SV_MVL( 2);                                  \
-        SET_SV_3CSRS( SV_REG_CSR( 1, 4, wid1, 4, 1),       \
-                      SV_REG_CSR( 1, 12, wid2, 12, 1),        \
-                      SV_REG_CSR( 1, 14, wid3, 14, 1));       \
-        SET_SV_VL( 2);                                   \
+        SET_SV_MVL( vl );                                  \
+        SET_SV_3CSRS( SV_REG_CSR( 1, 15, wid1, 15, isvec1),       \
+                      SV_REG_CSR( 1, 12, wid2, 12, isvec2),        \
+                      SV_REG_CSR( 1, 28, wid3, 28, isvec3));       \
+        SET_SV_VL( vl );                                   \
                                                         \
-        addw   x14, x4, x12;                              \
+        addw   x28, x15, x12;                              \
                                                         \
         CLR_SV_CSRS();                                  \
         SET_SV_VL( 1);                                   \
         SET_SV_MVL( 1);                                  \
                                                         \
-        TEST_SV_IMM( x14, expect1 );                         \
-        TEST_SV_IMM( x15, expect2 );                       \
-        TEST_SV_IMM( x12, 0x0000005242322212);                       \
-        TEST_SV_IMM( x13, 0x0000005141312111);
+        TEST_SV_IMM( x28, expect1 );                         \
+        TEST_SV_IMM( x29, expect2 );                       \
+        TEST_SV_IMM( x30, expect3 );                       \
+        TEST_SV_IMM( x15, 0x0000005242322212);                       \
+        TEST_SV_IMM( x16, 0x0000005141312111);
 
 
 # SV test: vector-vector add
@@ -39,13 +49,29 @@ RVTEST_RV64U        # Define TVM used by program.
 # Test code region.
 RVTEST_CODE_BEGIN   # Start of test code.
 
-        # 
-        SV_ELWIDTH_TEST(  0, 0, 0, 0xffffffff8b6bab8b,  0xffffffff88684828 )
-        SV_ELWIDTH_TEST(  0, 0, 3, 0x886848288b6bab8b,  0xa5a5a5a5a5a5a5a5 )
-        SV_ELWIDTH_TEST(  1, 1, 0, 0xffffffffffffff8b,  0xffffffffffffffab )
-        SV_ELWIDTH_TEST(  1, 1, 3, 0xffffffabffffff8b,  0xa5a5a5a5a5a5a5a5 )
-        SV_ELWIDTH_TEST(  1, 1, 2, 0xa5a5a5a5ffabff8b,  0xa5a5a5a5a5a5a5a5 )
-        SV_ELWIDTH_TEST(  1, 1, 1, 0xa5a5a5a5a5a5ab8b,  0xa5a5a5a5a5a5a5a5 )
+        # TODO: add "addw" argument, add testdata argument
+        SV_ELWIDTH_TEST(  3, 0, 0, 0, 1, 1, 1,
+                0xffffffff8b6bab8b,  0xffffffff88684828,  0x0000000000000000 )
+        SV_ELWIDTH_TEST(  3, 0, 0, 3, 1, 1, 1,
+                0x886848288b6bab8b,  0xa5a5a5a500000000,  0xa5a5a5a5a5a5a5a5 )
+        SV_ELWIDTH_TEST(  3, 1, 1, 0, 1, 1, 1,
+                0xffffffffffffff8b,  0xffffffffffffffab,  0x000000000000006b )
+        SV_ELWIDTH_TEST(  3, 1, 1, 3, 1, 1, 1,
+                0xffffffabffffff8b,  0xa5a5a5a50000006b,  0xa5a5a5a5a5a5a5a5 )
+        SV_ELWIDTH_TEST(  3, 1, 1, 2, 1, 1, 1,
+                0xa5a5006bffabff8b,  0xa5a5a5a5a5a5a5a5,  0xa5a5a5a5a5a5a5a5 )
+        SV_ELWIDTH_TEST(  3, 1, 1, 1, 1, 1, 1,
+                0xa5a5a5a5a56bab8b,  0xa5a5a5a5a5a5a5a5,  0xa5a5a5a5a5a5a5a5 )
+        SV_ELWIDTH_TEST(  3, 0, 0, 0, 1, 1, 0,
+                0xffffffff8b6bab8b,  0xa5a5a5a5a5a5a5a5,  0xa5a5a5a5a5a5a5a5 )
+        SV_ELWIDTH_TEST(  3, 3, 3, 3, 1, 1, 0,
+                0xffffffff8b6bab8b,  0xa5a5a5a5a5a5a5a5,  0xa5a5a5a5a5a5a5a5 )
+        SV_ELWIDTH_TEST(  3, 2, 2, 3, 1, 1, 0,
+                0xffffffffffffab8b,  0xa5a5a5a5a5a5a5a5,  0xa5a5a5a5a5a5a5a5 )
+        SV_ELWIDTH_TEST(  3, 3, 2, 3, 1, 1, 0,
+                0x000000004232ab8b,  0xa5a5a5a5a5a5a5a5,  0xa5a5a5a5a5a5a5a5 )
+        SV_ELWIDTH_TEST(  3, 2, 3, 3, 1, 1, 0,
+                0x000000004939ab8b,  0xa5a5a5a5a5a5a5a5,  0xa5a5a5a5a5a5a5a5 )
 
         RVTEST_PASS           # Signal success.
 fail:
@@ -59,8 +85,10 @@ RVTEST_CODE_END     # End of test code.
 testdata:
         .dword 0x0000005949398979
         .dword 0x0000005747372717
+        .dword 0x0000000000000000
         .dword 0x0000005242322212
         .dword 0x0000005141312111
+        .dword 0x0000000000000000
 
 # Output data section.
 RVTEST_DATA_BEGIN   # Start of test output data region.