Add another FP recoding test case

[riscv-tests.git] / isa / rv64uv / amoand_w.S

diff --git a/isa/rv64uv/amoand_w.S b/isa/rv64uv/amoand_w.S
index 93f660f53eccbe88125aff701d5abd79783bd81f..2dcb3438c27bbf0835833c0a7f7e3330c8e69d87 100644 (file)
--- a/isa/rv64uv/amoand_w.S
+++ b/isa/rv64uv/amoand_w.S
@@ -1,3 +1,5 @@
+# See LICENSE for license details.
+
 #*****************************************************************************
 # amoand_w.S
 #-----------------------------------------------------------------------------
@@ -8,7 +10,7 @@
 #include "riscv_test.h"
 #include "test_macros.h"
 
-RVTEST_RV64U
+RVTEST_RV64UV
 RVTEST_CODE_BEGIN
 
   vsetcfg 4,0
@@ -27,7 +29,7 @@ RVTEST_CODE_BEGIN
   li a2,0
 loop:
   lw a0,0(a6)
-  addi x28,a1,2
+  addi TESTNUM,a1,2
   bne a0,a2,fail
   addi a6,a6,4
   addi a1,a1,1