Add another FP recoding test case

[riscv-tests.git] / isa / rv64uv / movn.S

diff --git a/isa/rv64uv/movn.S b/isa/rv64uv/movn.S
index 84bb27ef25d5ecde4e7a08b190e5e0b33c289a2a..97b62613f2457ef713cbdcd6b8828fe743e12e48 100644 (file)
--- a/isa/rv64uv/movn.S
+++ b/isa/rv64uv/movn.S
@@ -1,3 +1,5 @@
+# See LICENSE for license details.
+
 #*****************************************************************************
 # movn.S
 #-----------------------------------------------------------------------------
@@ -8,7 +10,7 @@
 #include "riscv_test.h"
 #include "test_macros.h"
 
-RVTEST_RV64U
+RVTEST_RV64UV
 RVTEST_CODE_BEGIN
 
   vsetcfg 4,0