soc/integration/csr_bridge: use registered version only when SDRAM is present.

[litex.git] / litex_setup.py

diff --git a/litex_setup.py b/litex_setup.py
index 703b35deeb12d254ce2a166432ddd5aef6538f1a..d1e9a6cafe4ea5d1298a9729c6519f368e103ebf 100755 (executable)
--- a/litex_setup.py
+++ b/litex_setup.py
@@ -46,9 +46,10 @@ repos = [
     ("pythondata-cpu-picorv32",    ("https://github.com/litex-hub/", False, True, None)),
     ("pythondata-cpu-serv",        ("https://github.com/litex-hub/", False, True, None)),
     ("pythondata-cpu-vexriscv",    ("https://github.com/litex-hub/", False, True, None)),
+    ("pythondata-cpu-vexriscv-smp",("https://github.com/litex-hub/", True,  True, None)),
     ("pythondata-cpu-rocket",      ("https://github.com/litex-hub/", False, True, None)),
     ("pythondata-cpu-minerva",     ("https://github.com/litex-hub/", False, True, None)),
-    ("pythondata-cpu-microwatt",   ("https://github.com/litex-hub/", False, True, 0xa7859fb)),
+    ("pythondata-cpu-microwatt",   ("https://github.com/litex-hub/", False, True, 0xba76652)),
     ("pythondata-cpu-blackparrot", ("https://github.com/litex-hub/", False, True, None)),
     ("pythondata-cpu-cv32e40p",    ("https://github.com/litex-hub/", True,  True, None)),
 ]