build.plat: TemplatedPlatform.iter_extra_files→Platform.iter_files.

[nmigen.git] / nmigen / vendor / intel.py

diff --git a/nmigen/vendor/intel.py b/nmigen/vendor/intel.py
index 8393deab9d1c9ea3d37f87f3569267b903a54ef8..dc1f1bc7a2e8d55a411f63246a0e42e9bc5e0956 100644 (file)
--- a/nmigen/vendor/intel.py
+++ b/nmigen/vendor/intel.py
@@ -82,13 +82,13 @@ class IntelPlatform(TemplatedPlatform):
                 set_global_assignment -name NUM_PARALLEL_PROCESSORS {{get_override("nproc")}}
             {% endif %}
 
-            {% for file in platform.iter_extra_files(".v") -%}
+            {% for file in platform.iter_files(".v") -%}
                 set_global_assignment -name VERILOG_FILE {{file|tcl_quote}}
             {% endfor %}
-            {% for file in platform.iter_extra_files(".sv") -%}
+            {% for file in platform.iter_files(".sv") -%}
                 set_global_assignment -name SYSTEMVERILOG_FILE {{file|tcl_quote}}
             {% endfor %}
-            {% for file in platform.iter_extra_files(".vhd", ".vhdl") -%}
+            {% for file in platform.iter_files(".vhd", ".vhdl") -%}
                 set_global_assignment -name VHDL_FILE {{file|tcl_quote}}
             {% endfor %}
             set_global_assignment -name VERILOG_FILE {{name}}.v