Fix IO_STANDARD on all iCE40 boards.

[nmigen-boards.git] / nmigen_boards / icestick.py

diff --git a/nmigen_boards/icestick.py b/nmigen_boards/icestick.py
index f41006d64b14d7d1efda830af5f4417e29475f9f..bbcad5ee065275fca44be2168e4981b36818e452 100644 (file)
--- a/nmigen_boards/icestick.py
+++ b/nmigen_boards/icestick.py
@@ -16,13 +16,13 @@ class ICEStickPlatform(LatticeICE40Platform):
     default_clk = "clk12"
     resources   = [
         Resource("clk12", 0, Pins("21", dir="i"),
-                 Clock(12e6), Attrs(GLOBAL=True, IO_STANDARD="SB_LVCMOS33")),
+                 Clock(12e6), Attrs(GLOBAL=True, IO_STANDARD="SB_LVCMOS")),
 
-        Resource("user_led", 0, Pins("99", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")),
-        Resource("user_led", 1, Pins("98", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")),
-        Resource("user_led", 2, Pins("97", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")),
-        Resource("user_led", 3, Pins("96", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")),
-        Resource("user_led", 4, Pins("95", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")),
+        Resource("user_led", 0, Pins("99", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS")),
+        Resource("user_led", 1, Pins("98", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS")),
+        Resource("user_led", 2, Pins("97", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS")),
+        Resource("user_led", 3, Pins("96", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS")),
+        Resource("user_led", 4, Pins("95", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS")),
 
         UARTResource(0,
             rx="9", tx="8", rts="7", cts="4", dtr="3", dsr="2", dcd="1",
@@ -31,12 +31,12 @@ class ICEStickPlatform(LatticeICE40Platform):
 
         IrDAResource(0,
             rx="106", tx="105", sd="107",
-            attrs=Attrs(IO_STANDARD="SB_LVCMOS33")
+            attrs=Attrs(IO_STANDARD="SB_LVCMOS")
         ),
 
         *SPIFlashResources(0,
             cs="71", clk="70", mosi="67", miso="68",
-            attrs=Attrs(IO_STANDARD="SB_LVCMOS33")
+            attrs=Attrs(IO_STANDARD="SB_LVCMOS")
         ),
     ]
     connectors  = [