Add Tercel PHY reset synchronization

[microwatt.git] / plru_tb.vhdl

diff --git a/plru_tb.vhdl b/plru_tb.vhdl
index 18512e49ae9bd5e04b9b8c45af5450b4d7ff0488..1afbd65676fc86e5327fb76747abf7bf0990a7fb 100644 (file)
--- a/plru_tb.vhdl
+++ b/plru_tb.vhdl
@@ -103,7 +103,6 @@ begin
        wait for clk_period;
        report "lru:" & to_hstring(lru);
 
-        assert false report "end of test" severity failure;
-        wait;
+        std.env.finish;
     end process;
 end;