fix names

[pinmux.git] / src / bsv / peripheral_gen.py

diff --git a/src/bsv/peripheral_gen.py b/src/bsv/peripheral_gen.py
index 8b450251492d2dd5060d4ed3bf48130dfc5e63d7..d424778ee096163fa0a27ccc18090567d4518c69 100644 (file)
--- a/src/bsv/peripheral_gen.py
+++ b/src/bsv/peripheral_gen.py
@@ -63,7 +63,10 @@ class PBase(object):
                         ps_ = ps + '_out'
                     else:
                         ps_ = ps
-                    n_ = "{0}{1}".format(n, count)
+                    if not n.startswith('gpio'): # XXX EURGH! horrible hack
+                      n_ = "{0}{1}".format(n, count)
+                    else:
+                      n_ = n
                     ret.append("      {0}({1}.{2});".format(ps_, n_, fname))
                 fname = None
                 if p.get('outen'):
@@ -84,7 +87,8 @@ class PBase(object):
                     ret.append(
                         "    rule con_%s%d_%s_in;" %
                         (name, count, pname))
-                    ret.append("      {1}.{2}({0});".format(ps_, n, fname))
+                    n_ = "{0}{1}".format(n, count)
+                    ret.append("      {1}.{2}({0});".format(ps_, n_, fname))
                     ret.append("    endrule")
         return '\n'.join(ret)
 
@@ -217,8 +221,8 @@ class twi(PBase):
                 'scl': 'out.scl_in'}.get(pname, '')
 
     def pinname_outen(self, pname):
-        return {'sda': 'out.sda_outen',
-                'scl': 'out.scl_outen'}.get(pname, '')
+        return {'sda': 'out.sda_out_en',
+                'scl': 'out.scl_out_en'}.get(pname, '')
 
     def pinname_tweak(self, pname, typ, txt):
         if typ == 'outen':
@@ -271,7 +275,7 @@ class qspi(PBase):
         ret.append("    // all ins done in one rule from 4-bitfield")
         ret.append("    rule con_%s%d_io_in;" % (name, count))
         ret.append("       {0}{1}.out.io_i({{".format(name, count))
-        for p in self.peripheral.pinspecs:
+        for i, p in enumerate(self.peripheral.pinspecs):
             typ = p['type']
             pname = p['name']
             if not pname.startswith('io'):
@@ -280,7 +284,8 @@ class qspi(PBase):
             n = name
             sname = self.peripheral.pname(pname).format(count)
             ps = "pinmux.peripheral_side.%s_in" % sname
-            ret.append("            {0},".format(ps))
+            comma = '' if i == 5 else ','
+            ret.append("            {0}{1}".format(ps, comma))
         ret.append("        });")
         ret.append("    endrule")
         return '\n'.join(ret)
@@ -292,7 +297,7 @@ class pwm(PBase):
         return "        import pwm::*;"
 
     def slowifdecl(self):
-        return "        interface PWMIO pwm{0}_o;"
+        return "        interface PWMIO pwm{0};"
 
     def num_axi_regs32(self):
         return 4
@@ -325,8 +330,11 @@ class gpio(PBase):
             GPIO also has a muxer per bank
         """
         name = name.upper()
+        mname = 'mux' + name[4:]
+        mname = mname.upper()
+        print "AXIslavenum", name,  mname
         (ret, x) = PBase.axi_slave_idx(self, idx, name, ifacenum)
-        (ret2, x) = PBase.axi_slave_idx(self, idx, "mux", ifacenum)
+        (ret2, x) = PBase.axi_slave_idx(self, idx, mname, ifacenum)
         return ("%s\n%s" % (ret, ret2), 2)
 
     def mkslow_peripheral(self, size=0):