getting bsv compile working

[pinmux.git] / src / bsv / pinmux_generator.py

diff --git a/src/bsv/pinmux_generator.py b/src/bsv/pinmux_generator.py
index 9fe54eb13ed92529183adbeef9d3e897746cc9c6..9657c95a3b896aff8d615bfc53db124f5f046a1d 100644 (file)
--- a/src/bsv/pinmux_generator.py
+++ b/src/bsv/pinmux_generator.py
@@ -72,7 +72,8 @@ def pinmuxgen(pth=None, verify=True):
     shutil.copyfile(os.path.join(cwd, 'Makefile.template'),
                     os.path.join(bp, 'Makefile'))
     cwd = os.path.join(cwd, 'bsv_lib')
-    for fname in ['AXI4_Lite_Types.bsv', 'Semi_FIFOF.bsv']:
+    for fname in ['AXI4_Lite_Types.bsv', 'Semi_FIFOF.bsv', 
+                  'gpio.bsv',  'mux.bsv']:
         shutil.copyfile(os.path.join(cwd, fname),
                         os.path.join(bl, fname))
 
@@ -303,36 +304,35 @@ endpackage
 
 def write_bvp(bvp, p, ifaces):
     # ######## Generate bus transactors ################
-    gpiocfg = '\t\tinterface GPIO_config#({4}) bank{3}_config\n;' \
+    gpiocfg = '\t\tinterface GPIO_config#({4}) bank{3}_config;\n' \
               '\t\tinterface AXI4_Lite_Slave_IFC#({0},{1},{2}) bank{3}_slave;'
-    muxcfg  = '\t\tinterface MUX_config#({4}) muxb{3}_config;\n' \
-              '\t\tinterface AXI4_Lite_Slave_IFC#({0},{1},{2}) muxb{3}_slave;'
+    muxcfg = '\t\tinterface MUX_config#({4}) muxb{3}_config;\n' \
+        '\t\tinterface AXI4_Lite_Slave_IFC#({0},{1},{2}) muxb{3}_slave;'
 
-    gpiodec = '\tGPIO#({0} mygpio{1} <- mkgpio();'
-    muxdec  = '\tMUX#({0} mymux{1} <- mkgpio();'
+    gpiodec = '\tGPIO#({0}) mygpio{1} <- mkgpio();'
+    muxdec = '\tMUX#({0}) mymux{1} <- mkgpio();'
     gpioifc = '\tinterface bank{0}_config=mygpio{0}.pad_config;\n' \
               '\tinterface bank{0}A_slave=mygpio{0}.axi_slave;'
-    muxifc  = '\tinterface muxb{0}_config=mymux{0}.pad_config;\n' \
-              '\tinterface muxb{0}A_slave=mymux{0}.axi_slave;'
+    muxifc = '\tinterface muxb{0}_config=mymux{0}.pad_config;\n' \
+        '\tinterface muxb{0}A_slave=mymux{0}.axi_slave;'
     with open(bvp, 'w') as bsv_file:
         # assume here that all muxes have a 1:1 gpio
         cfg = []
         decl = []
         idec = []
-        iks = ifaces.keys()
-        iks.sort()
+        iks = sorted(ifaces.keys())
         for iname in iks:
-            if not iname.startswith('gpio'): # TODO: declare other interfaces
+            if not iname.startswith('gpio'):  # TODO: declare other interfaces
                 continue
             bank = iname[4:]
             ifc = ifaces[iname]
             npins = len(ifc.pinspecs)
             cfg.append(gpiocfg.format(p.ADDR_WIDTH, p.DATA_WIDTH,
-                                        0, # USERSPACE
-                                        bank, npins))
+                                      0,  # USERSPACE
+                                      bank, npins))
             cfg.append(muxcfg.format(p.ADDR_WIDTH, p.DATA_WIDTH,
-                                        0, # USERSPACE
-                                        bank, npins))
+                                     0,  # USERSPACE
+                                     bank, npins))
             decl.append(gpiodec.format(npins, bank))
             decl.append(muxdec .format(npins, bank))
             idec.append(gpioifc.format(bank))
@@ -342,6 +342,6 @@ def write_bvp(bvp, p, ifaces):
         print dir(ifaces['gpioa'])
         print ifaces['gpioa'].pinspecs
         gpiodecl = '\n'.join(decl) + '\n' + '\n'.join(idec)
-        gpiocfg = '\n'.join(cfg) 
+        gpiocfg = '\n'.join(cfg)
         bsv_file.write(axi4_lite.format(gpiodecl, gpiocfg))
     # ##################################################