shutil.copyfile(os.path.join(cwd, 'Makefile.template'),
os.path.join(bp, 'Makefile'))
cwd = os.path.join(cwd, 'bsv_lib')
- for fname in ['AXI4_Lite_Types.bsv', 'Semi_FIFOF.bsv']:
+ for fname in ['AXI4_Lite_Types.bsv', 'Semi_FIFOF.bsv',
+ 'gpio.bsv', 'mux.bsv',
+ 'AXI4_Types.bsv', 'defined_types.bsv',
+ 'AXI4_Fabric.bsv', 'Uart16550.bsv',
+ 'AXI4_Lite_Fabric.bsv', 'ConcatReg.bsv',
+ 'Uart_bs.bsv', 'RS232_modified.bsv',
+ 'AXI4Lite_AXI4_Bridge.bsv',
+ 'I2C_top.bsv', 'I2C_Defs.bsv',
+ 'plic.bsv', 'Cur_Cycle.bsv',
+ 'ClockDiv.bsv', 'axi_addr_generator.bsv',
+ 'jtagdtm_new.bsv', 'jtagdefines.bsv',
+ 'sdcard_dummy.bsv',
+ 'pwm.bsv', 'qspi.bsv', 'qspi.defs',
+ ]:
shutil.copyfile(os.path.join(cwd, fname),
os.path.join(bl, fname))
pmp = os.path.join(bp, 'pinmux.bsv')
ptp = os.path.join(bp, 'PinTop.bsv')
bvp = os.path.join(bp, 'bus.bsv')
+ idef = os.path.join(bp, 'instance_defines.bsv')
+ slow = os.path.join(bp, 'slow_peripherals.bsv')
+ slowt = os.path.join(cwd, 'slow_peripherals_template.bsv')
write_pmp(pmp, p, ifaces, iocells)
write_ptp(ptp, p, ifaces)
write_bvp(bvp, p, ifaces)
write_bus(bus, p, ifaces)
+ write_instances(idef, p, ifaces)
+ write_slow(slow, slowt, p, ifaces, iocells)
+
+
+def write_slow(slow, template, p, ifaces, iocells):
+ """ write out the slow_peripherals.bsv file.
+ joins all the peripherals together into one AXI Lite interface
+ """
+ with open(template) as bsv_file:
+ template = bsv_file.read()
+ imports = ifaces.slowimport()
+ ifdecl = ifaces.slowifdeclmux()
+ regdef = ifaces.axi_reg_def()
+ slavedecl = ifaces.axi_slave_idx()
+ fnaddrmap = ifaces.axi_addr_map()
+ mkslow = ifaces.mkslow_peripheral()
+ mkcon = ifaces.mk_connection()
+ mkcellcon = ifaces.mk_cellconn()
+ pincon = ifaces.mk_pincon()
+ inst = ifaces.slowifinstance()
+ with open(slow, "w") as bsv_file:
+ bsv_file.write(template.format(imports, ifdecl, regdef, slavedecl,
+ fnaddrmap, mkslow, mkcon, mkcellcon,
+ pincon, inst))
def write_bus(bus, p, ifaces):
bsv_file.write('''
- interface PeripheralSide;
- // declare the interface to the peripherals
- // Each peripheral's function will be either an input, output
- // or be bi-directional. an input field will be an output from the
- // peripheral and an output field will be an input to the peripheral.
- // Bi-directional functions also have an output-enable (which
- // again comes *in* from the peripheral)''')
- # ==============================================================
+ interface IOCellSide;
+ // declare the interface to the IO cells.
+ // Each IO cell will have 1 input field (output from pin mux)
+ // and an output and out-enable field (input to pinmux)''')
- # == create method definitions for all peripheral interfaces ==#
+ # == create method definitions for all iocell interfaces ==#
iocells.ifacefmt(bsv_file)
# ===== finish interface definition and start module definition=======
# ===== io cell definition =======
bsv_file.write('''
- interface IOCellSide;
- // declare the interface to the IO cells.
- // Each IO cell will have 1 input field (output from pin mux)
- // and an output and out-enable field (input to pinmux)''')
+ interface PeripheralSide;
+ // declare the interface to the peripherals
+ // Each peripheral's function will be either an input, output
+ // or be bi-directional. an input field will be an output from the
+ // peripheral and an output field will be an input to the peripheral.
+ // Bi-directional functions also have an output-enable (which
+ // again comes *in* from the peripheral)''')
+ # ==============================================================
- # == create method definitions for all iocell interfaces ==#
+ # == create method definitions for all peripheral interfaces ==#
ifaces.ifacefmt(bsv_file)
bsv_file.write("\n endinterface\n")
# ========================= Actual pinmuxing ========================#
bsv_file.write('''
/*====== This where the muxing starts for each io-cell======*/
+ Wire#(Bit#(1)) val0<-mkDWire(0); // need a zero
''')
bsv_file.write(p.pinmux)
bsv_file.write('''
ifaces.ifacedef(bsv_file)
bsv_file.write("\n endinterface;")
-
bsv_file.write(footer)
print("BSV file successfully generated: bsv_src/pinmux.bsv")
# ======================================================================
def write_bvp(bvp, p, ifaces):
# ######## Generate bus transactors ################
+ gpiocfg = '\t\tinterface GPIO_config#({4}) bank{3}_config;\n' \
+ '\t\tinterface AXI4_Lite_Slave_IFC#({0},{1},{2}) bank{3}_slave;'
+ muxcfg = '\t\tinterface MUX_config#({4}) muxb{3}_config;\n' \
+ '\t\tinterface AXI4_Lite_Slave_IFC#({0},{1},{2}) muxb{3}_slave;'
+
+ gpiodec = '\tGPIO#({0}) mygpio{1} <- mkgpio();'
+ muxdec = '\tMUX#({0}) mymux{1} <- mkmux();'
+ gpioifc = '\tinterface bank{0}_config=mygpio{0}.pad_config;\n' \
+ '\tinterface bank{0}_slave=mygpio{0}.axi_slave;'
+ muxifc = '\tinterface muxb{0}_config=mymux{0}.mux_config;\n' \
+ '\tinterface muxb{0}_slave=mymux{0}.axi_slave;'
with open(bvp, 'w') as bsv_file:
- bsv_file.write(axi4_lite.format(p.ADDR_WIDTH, p.DATA_WIDTH))
+ # assume here that all muxes have a 1:1 gpio
+ cfg = []
+ decl = []
+ idec = []
+ iks = sorted(ifaces.keys())
+ for iname in iks:
+ if not iname.startswith('gpio'): # TODO: declare other interfaces
+ continue
+ bank = iname[4:]
+ ifc = ifaces[iname]
+ npins = len(ifc.pinspecs)
+ cfg.append(gpiocfg.format(p.ADDR_WIDTH, p.DATA_WIDTH,
+ 0, # USERSPACE
+ bank, npins))
+ cfg.append(muxcfg.format(p.ADDR_WIDTH, p.DATA_WIDTH,
+ 0, # USERSPACE
+ bank, npins))
+ decl.append(gpiodec.format(npins, bank))
+ decl.append(muxdec .format(npins, bank))
+ idec.append(gpioifc.format(bank))
+ idec.append(muxifc.format(bank))
+ print dir(ifaces)
+ print ifaces.items()
+ print dir(ifaces['gpioa'])
+ print ifaces['gpioa'].pinspecs
+ gpiodecl = '\n'.join(decl) + '\n' + '\n'.join(idec)
+ gpiocfg = '\n'.join(cfg)
+ bsv_file.write(axi4_lite.format(gpiodecl, gpiocfg))
# ##################################################
+
+
+def write_instances(idef, p, ifaces):
+ with open(idef, 'w') as bsv_file:
+ txt = '''\
+`define ADDR {0}
+`define PADDR {0}
+`define DATA {1}
+`define Reg_width {1}
+`define USERSPACE 0
+
+// TODO: work out if these are needed
+`define PWM_AXI4Lite
+`define PRFDEPTH 6
+`define VADDR 39
+`define DCACHE_BLOCK_SIZE 4
+`define DCACHE_WORD_SIZE 8
+`define PERFMONITORS 64
+`define DCACHE_WAYS 4
+`define DCACHE_TAG_BITS 20 // tag_bits = 52
+`define PLIC
+ `define PLICBase 'h0c000000
+ `define PLICEnd 'h10000000
+`define INTERRUPT_PINS 64
+
+`define BAUD_RATE 130
+`ifdef simulate
+ `define BAUD_RATE 5 //130 //
+`endif
+'''
+ bsv_file.write(txt.format(p.ADDR_WIDTH, p.DATA_WIDTH))
projects / pinmux.git / blobdiff