Merge branch 'master' of ssh://git.libre-riscv.org:922/ls2

[ls2.git] / src / ls2.py

diff --git a/src/ls2.py b/src/ls2.py
index d236ff280c60c46dcb95ba70c07c5bd95731f433..4ea9699e910ce3795b030a8c051385fd0c4446bc 100644 (file)
--- a/src/ls2.py
+++ b/src/ls2.py
@@ -868,7 +868,7 @@ def build_platform(fpga, firmware):
         clk_freq = 50e6
         dram_clk_freq = 100e6
     if fpga == 'arty_a7':
-        clk_freq = 50e6
+        clk_freq = 24e6 # urrr "working" with the QSPI core (25 mhz does not)
     if fpga == 'ulx3s':
         clk_freq = 40.0e6
     if fpga == 'orangecrab':