add litex name map

[pinmux.git] / src / spec / ls180.py

diff --git a/src/spec/ls180.py b/src/spec/ls180.py
index fb9a21b0724cdefd94588a8c8e05f3e324d244c2..3eea891e9df021e4ef8942ace24eda988d216e79 100644 (file)
--- a/src/spec/ls180.py
+++ b/src/spec/ls180.py
@@ -139,6 +139,7 @@ def pinspec():
 def pinparse(psp, pinspec):
     p = Parse(pinspec, verify=False)
     pinmap = {}
+    litexmap = {}
 
     print p.muxed_cells
     print p.muxed_cells_bank
@@ -157,6 +158,7 @@ def pinparse(psp, pinspec):
     n_extpower = 0
     for (padnum, name, x), bank in zip(p.muxed_cells, p.muxed_cells_bank):
         orig_name = name
+        litex_name = None
         domain = None # TODO, get this from the PinSpec.  sigh
         padnum = int(padnum)
         start = p.bankstart[bank]
@@ -198,13 +200,13 @@ def pinparse(psp, pinspec):
                 name = None
             elif name == 'sys_pllclk':
                 name = None # ignore
-            elif name == 'sys_pllock':
-                name = 'sys_pll_lck_o'
+            elif name == 'sys_pllvcout':
+                name = 'sys_pll_vco_o'
                 pad = ['p_' + name, name, name]
-            elif name == 'sys_pllout':
-                name = 'sys_pll_18_o'
+            elif name == 'sys_plltestout':
+                name = 'sys_pll_testout_o'
                 pad = ['p_' + name, name, name]
-            elif name.startswith('sys_csel'):
+            elif name.startswith('sys_pllsel'):
                 i = name[-1]
                 name2 = 'sys_clksel_i(%s)' % i
                 name = 'p_sys_clksel_' + i
@@ -224,6 +226,7 @@ def pinparse(psp, pinspec):
                 prefix = 'spimaster_'
             else:
                 prefix = 'spisdcard_'
+            litex_name = name[:6] + suffix
             name = prefix + suffix
             pad = ['p_' + name, name, name]
         # SD/MMC
@@ -241,6 +244,7 @@ def pinparse(psp, pinspec):
             else:
                 name = 'sdcard_' + name[4:]
                 pad = ['p_' + name, name, name]
+            litex_name = orig_name[:4] + "_".join(name.split("_")[1:])
         # SDRAM
         elif name.startswith('sdr'):
             domain = 'SDR'
@@ -276,6 +280,7 @@ def pinparse(psp, pinspec):
             else:
                 name = 'sdram_' + name[4:]
                 pad = ['p_' + name, name, name]
+            litex_name = orig_name[:4] + "_".join(name.split("_")[1:])
         # UART
         elif name.startswith('uart'):
             domain = 'UART'
@@ -324,6 +329,9 @@ def pinparse(psp, pinspec):
             pad = ['p_' + name, name, name]
             print ("GPIO pad", name, pad)
 
+        if litex_name is None:
+            litex_name = name
+
         # JTAG domain
         if name and name.startswith('jtag'):
             domain = 'JTAG'
@@ -345,6 +353,7 @@ def pinparse(psp, pinspec):
                         clocks[domain] = name
             # record remap
             pinmap[orig_name] = name
+            litexmap[litex_name] = name
 
         # add pad to iopads
         if domain and pad is not None:
@@ -412,14 +421,11 @@ def pinparse(psp, pinspec):
               'pads.instances' : iopads,
               'pins.specs' : psp.byspec,
               'pins.map' : pinmap,
+              'litex.map' : litexmap,
               'chip.domains' : domains,
               'chip.clocks' : clocks,
               'chip.n_intpower': n_intpower,
               'chip.n_extpower': n_extpower,
            }
 
-    chip = json.dumps(chip)
-    with open("ls180/litex_pinpads.json", "w") as f:
-        f.write(chip)
-
-    return pinmap
+    return pinmap, chip