correction on VSS/VDD internal/external

[pinmux.git] / src / spec / ls180.py

diff --git a/src/spec/ls180.py b/src/spec/ls180.py
index d0393eabf4bee6d0e4adef28cf92fb49c5d1918b..680fecee7e399038ef146bfbf2512bb3af5441f4 100644 (file)
--- a/src/spec/ls180.py
+++ b/src/spec/ls180.py
@@ -61,52 +61,58 @@ def pinspec():
 
     ps.vdd("E", ('S', 0), 0, 0, 1)
     ps.vss("E", ('S', 1), 0, 0, 1)
-    ps.vdd("I", ('S', 2), 0, 5, 1)
-    ps.vss("I", ('S', 3), 0, 5, 1)
-    ps.sdram1("", ('S', 4), 0, 0, 21)
-    ps.mi2c("", ('S', 26), 0, 0, 2)
-    ps.vss("I", ('S', 28), 0, 6, 1)
-    ps.vdd("I", ('S', 29), 0, 6, 1)
-    ps.vss("E", ('S', 30), 0, 13, 1)
-    ps.vdd("E", ('S', 31), 0, 13, 1)
+    ps.vdd("I", ('S', 2), 0, 0, 1)
+    ps.vss("I", ('S', 3), 0, 0, 1)
+    ps.mi2c("", ('S', 4), 0, 0, 2)
+    ps.sdram1("", ('S', 6), 0, 0, 15) # SDRAM DAM0, D0-7, AD0-3
+    ps.vss("I", ('S', 22), 0, 1, 1)
+    ps.vdd("I", ('S', 23), 0, 1, 1)
+    ps.vss("E", ('S', 24), 0, 1, 1)
+    ps.vdd("E", ('S', 25), 0, 1, 1)
+    ps.sdram1("", ('S', 26), 0, 15, 6) # AD4-9
 
-    ps.vdd("E", ('W', 0), 0, 1, 1)
-    ps.vss("E", ('W', 1), 0, 1, 1)
-    ps.vdd("I", ('W', 2), 0, 7, 1)
-    ps.vss("I", ('W', 3), 0, 7, 1)
-    ps.sdram2("", ('W', 4), 0, 0, 12)
-    ps.sdram1("", ('W', 16), 0, 21, 9)
-    ps.uart("0", ('W', 22), 0)
-    ps.jtag("", ('W', 24), 0, 0, 4)
-    ps.vss("I", ('W', 28), 0, 14, 1)
-    ps.vdd("I", ('W', 29), 0, 14, 1)
-    ps.vss("E", ('W', 30), 0, 8, 1)
-    ps.vdd("E", ('W', 31), 0, 8, 1)
+    ps.sdram2("", ('W', 0), 0, 0, 4) # 1st 4, AD10-12,DQM1
+    ps.vdd("E", ('W', 4), 0, 2, 1)
+    ps.vss("E", ('W', 5), 0, 2, 1)
+    ps.vdd("I", ('W', 6), 0, 2, 1)
+    ps.vss("I", ('W', 7), 0, 2, 1)
+    ps.sdram2("", ('W', 8), 0, 4, 8) # D8-15
+    ps.sdram1("", ('W', 16), 0, 21, 9) # clk etc.
+    ps.vss("I", ('W', 22), 0, 3, 1)
+    ps.vdd("I", ('W', 23), 0, 3, 1)
+    ps.vss("E", ('W', 24), 0, 3, 1)
+    ps.vdd("E", ('W', 25), 0, 3, 1)
+    ps.uart("0", ('W', 26), 0)
+    ps.mspi("0", ('W', 28), 0)
 
-    ps.vss("I", ('E', 0), 0, 2, 1)
-    ps.vdd("I", ('E', 1), 0, 2, 1)
-    ps.vdd("I", ('E', 2), 0, 10, 1)
-    ps.vss("I", ('E', 3), 0, 10, 1)
-    ps.mspi("0", ('E', 4), 0)
-    ps.gpio("", ('E', 9), 0, 0, 16)
-    ps.eint("", ('E', 25), 0, 0, 3)
-    ps.vss("I", ('E', 28), 0, 9, 1)
-    ps.vdd("I", ('E', 29), 0, 9, 1)
-    ps.vss("I", ('E', 30), 0, 3, 1)
-    ps.vdd("I", ('E', 31), 0, 3, 1)
+    ps.sys("", ('E', 0), 0, 5, 1) # analog VCO out in right top
+    ps.gpio("", ('E', 1), 0, 0, 5) # GPIO 0-4
+    ps.vss("E", ('E', 6), 0, 4, 1)
+    ps.vdd("E", ('E', 7), 0, 4, 1)
+    ps.vdd("I", ('E', 8), 0, 4, 1)
+    ps.vss("I", ('E', 9), 0, 4, 1)
+    ps.gpio("", ('E', 10), 0, 5, 3) # GPIO 5-7
+    ps.jtag("", ('E', 13), 0, 0, 4)
+    ps.gpio("", ('E', 17), 0, 8, 5) # GPIO 8-12
+    ps.vss("I", ('E', 22), 0, 5, 1)
+    ps.vdd("I", ('E', 23), 0, 5, 1)
+    ps.vss("E", ('E', 24), 0, 5, 1)
+    ps.vdd("E", ('E', 25), 0, 5, 1)
+    ps.gpio("", ('E', 26), 0, 13, 3) # GPIO 13-15
+    ps.eint("", ('E', 29), 0, 0, 3)
 
-    ps.vss("E", ('N', 0), 0, 2, 1)
-    ps.vdd("E", ('N', 1), 0, 2, 1)
-    ps.vdd("I", ('N', 2), 0, 12, 1)
-    ps.vss("I", ('N', 3), 0, 12, 1)
+    ps.vss("E", ('N', 6), 0, 6, 1)
+    ps.vdd("E", ('N', 7), 0, 6, 1)
+    ps.vdd("I", ('N', 8), 0, 6, 1)
+    ps.vss("I", ('N', 9), 0, 6, 1)
     #ps.pwm("", ('N', 2), 0, 0, 2)  comment out (litex problem 25mar2021)
     #ps.mspi("1", ('N', 7), 0)       comment out (litex problem 25mar2021)
     #ps.sdmmc("0", ('N', 11), 0)     # comment out (litex problem 25mar2021)
-    ps.sys("", ('N', 22), 0, 0, 6) # should be 6, to do all PLL pins
-    ps.vss("I", ('N', 28), 0, 11, 1)
-    ps.vdd("I", ('N', 29), 0, 11, 1)
-    ps.vss("I", ('N', 30), 0, 4, 1)
-    ps.vdd("I", ('N', 31), 0, 4, 1)
+    ps.sys("", ('N', 27), 0, 0, 5) # all but analog out in top right
+    ps.vss("I", ('N', 22), 0, 7, 1)
+    ps.vdd("I", ('N', 23), 0, 7, 1)
+    ps.vss("E", ('N', 24), 0, 7, 1)
+    ps.vdd("E", ('N', 25), 0, 7, 1)
 
     #ps.mquadspi("1", ('S', 0), 0)
 
@@ -218,7 +224,7 @@ def pinparse(psp, pinspec):
                 name = None # ignore
             elif name == 'sys_pllvcout':
                 name = 'sys_pll_vco_o'
-                pad = ['p_' + name, name, name]
+                pad = ['p_' + name, name, name, "A"] # A for Analog
             elif name == 'sys_plltestout':
                 name = 'sys_pll_testout_o'
                 pad = ['p_' + name, name, name]
@@ -396,7 +402,11 @@ def pinparse(psp, pinspec):
             print "found spec", found
             assert found is not None
             # whewwww.  add the direction onto the pad spec list
-            pad.append(found[-1])
+            dirn = found[-1]
+            if pad[-1] == 'A':
+                pad[-1] += dirn
+            else:
+                pad.append(dirn)
             iopads.append(pad)
         elif pad is not None:
             iopads.append(pad)