add litex name map

[pinmux.git] / src / spec / ls180.py

diff --git a/src/spec/ls180.py b/src/spec/ls180.py
index 9ae784f8d1eba3e33b285ff29279a7cd244cf057..e78367e50a69318adcc4c825d07bb13b083b6b4a 100644 (file)
--- a/src/spec/ls180.py
+++ b/src/spec/ls180.py
@@ -79,16 +79,16 @@ def pinspec():
     ps.mspi("0", ('S', 8), 0)
     ps.uart("0", ('S', 13), 0)
     ps.gpio("", ('S', 15), 0, 0, 8)
-    ps.sys("", ('S', 23), 0, 0, 7)
+    ps.sys("", ('S', 23), 0, 0, 2) # should be 7, to do all PLL pins
     ps.vss("I", ('S', 30), 0, 3, 1)
     ps.vdd("I", ('S', 31), 0, 3, 1)
 
     ps.vss("E", ('W', 0), 0, 2, 1)
     ps.vdd("E", ('W', 1), 0, 2, 1)
-    ps.pwm("", ('W', 2), 0, 0, 2)
+    #ps.pwm("", ('W', 2), 0, 0, 2)  comment out (litex problem 25mar2021)
     ps.eint("", ('W', 4), 0, 0, 3)
     #ps.mspi("1", ('W', 7), 0)       comment out (litex problem 25mar2021)
-    #ps.sdmmc("0", ('W', 11), 0)     comment out (litex problem 25mar2021)
+    #ps.sdmmc("0", ('W', 11), 0)     # comment out (litex problem 25mar2021)
     ps.vss("I", ('W', 30), 0, 4, 1)
     ps.vdd("I", ('W', 31), 0, 4, 1)
 
@@ -139,6 +139,7 @@ def pinspec():
 def pinparse(psp, pinspec):
     p = Parse(pinspec, verify=False)
     pinmap = {}
+    litexmap = {}
 
     print p.muxed_cells
     print p.muxed_cells_bank
@@ -157,6 +158,7 @@ def pinparse(psp, pinspec):
     n_extpower = 0
     for (padnum, name, x), bank in zip(p.muxed_cells, p.muxed_cells_bank):
         orig_name = name
+        litex_name = None
         domain = None # TODO, get this from the PinSpec.  sigh
         padnum = int(padnum)
         start = p.bankstart[bank]
@@ -198,13 +200,13 @@ def pinparse(psp, pinspec):
                 name = None
             elif name == 'sys_pllclk':
                 name = None # ignore
-            elif name == 'sys_pllock':
-                name = 'sys_pll_lck_o'
+            elif name == 'sys_pllvcout':
+                name = 'sys_pll_vco_o'
                 pad = ['p_' + name, name, name]
-            elif name == 'sys_pllout':
-                name = 'sys_pll_18_o'
+            elif name == 'sys_plltestout':
+                name = 'sys_pll_testout_o'
                 pad = ['p_' + name, name, name]
-            elif name.startswith('sys_csel'):
+            elif name.startswith('sys_pllsel'):
                 i = name[-1]
                 name2 = 'sys_clksel_i(%s)' % i
                 name = 'p_sys_clksel_' + i
@@ -226,6 +228,7 @@ def pinparse(psp, pinspec):
                 prefix = 'spisdcard_'
             name = prefix + suffix
             pad = ['p_' + name, name, name]
+            litex_name = name[:6] + suffix
         # SD/MMC
         elif name.startswith('sd0'):
             domain = 'SD'
@@ -233,8 +236,7 @@ def pinparse(psp, pinspec):
                 i = name[5:]
                 name = 'sdcard_data' + i
                 name2 = 'sdcard_data_%%s(%s)' % i
-                pad = ['p_' + name, name, name2 % 'o', name2 % 'i',
-                            'sdcard_data_oe']
+                pad = ['p_'+name, name, name2 % 'o', name2 % 'i', name2 % 'oe']
             elif name.startswith('sd0_cmd'):
                 name = 'sdcard_cmd'
                 name2 = 'sdcard_cmd_%s'
@@ -242,6 +244,7 @@ def pinparse(psp, pinspec):
             else:
                 name = 'sdcard_' + name[4:]
                 pad = ['p_' + name, name, name]
+            litex_name = name[:6] + "_".join(name.split("_")[1:])
         # SDRAM
         elif name.startswith('sdr'):
             domain = 'SDR'
@@ -267,7 +270,7 @@ def pinparse(psp, pinspec):
                 i = name[5:]
                 name = 'sdram_dq_' + i
                 name2 = 'sdram_dq_%%s(%s)' % i
-                pad = ['p_'+name, name, name2 % 'o', name2 % 'i', 'sdram_dq_oe']
+                pad = ['p_'+name, name, name2 % 'o', name2 % 'i', name2 % 'oe']
             elif name == 'sdr_csn0':
                 name = 'sdram_cs_n'
                 pad = ['p_' + name, name, name]
@@ -277,6 +280,7 @@ def pinparse(psp, pinspec):
             else:
                 name = 'sdram_' + name[4:]
                 pad = ['p_' + name, name, name]
+            litex_name = name[:5] + "_".join(name.split("_")[1:])
         # UART
         elif name.startswith('uart'):
             domain = 'UART'
@@ -312,7 +316,7 @@ def pinparse(psp, pinspec):
             domain = 'EINT'
             i = name[-1]
             name = 'eint_%s' % i
-            name2 = 'eint(%s)' % i
+            name2 = 'eint_%s' % i
             pad = ['p_' + name, name2, name2]
         # PWM
         elif name.startswith('pwm'):
@@ -325,6 +329,9 @@ def pinparse(psp, pinspec):
             pad = ['p_' + name, name, name]
             print ("GPIO pad", name, pad)
 
+        if litex_name is None:
+            litex_name = name
+
         # JTAG domain
         if name and name.startswith('jtag'):
             domain = 'JTAG'
@@ -346,6 +353,7 @@ def pinparse(psp, pinspec):
                         clocks[domain] = name
             # record remap
             pinmap[orig_name] = name
+            litexmap[litex_name] = name
 
         # add pad to iopads
         if domain and pad is not None:
@@ -413,14 +421,11 @@ def pinparse(psp, pinspec):
               'pads.instances' : iopads,
               'pins.specs' : psp.byspec,
               'pins.map' : pinmap,
+              'litex.map' : litexmap,
               'chip.domains' : domains,
               'chip.clocks' : clocks,
               'chip.n_intpower': n_intpower,
               'chip.n_extpower': n_extpower,
            }
 
-    chip = json.dumps(chip)
-    with open("ls180/litex_pinpads.json", "w") as f:
-        f.write(chip)
-
-    return pinmap
+    return pinmap, chip