inout.append(pname)
for i in range(12):
buspins.append("SDRAD%d+" % i)
- for i in range(8):
- buspins.append("SDRDEN%d+" % i)
for i in range(2):
buspins.append("SDRBA%d+" % i)
buspins += ['SDRCKE+', 'SDRRASn+', 'SDRCASn+', 'SDRWEn+',
- 'SDRCSn0++']
+ 'SDRCSn0+']
return (buspins, inout)
('FB', flexbus2),
('SDR', sdram1),
('SDR', sdram2),
+ ('SDR', sdram3),
('EINT', eint),
('PWM', pwm),
('GPIO', gpio),