#!/usr/bin/env python3
from nmigen.build.dsl import Resource, Subsignal, Pins
from nmigen.build.plat import TemplatedPlatform
-from nmigen import Elaboratable, Signal, Module
+from nmigen import Elaboratable, Signal, Module, Instance
+from collections import OrderedDict
# Was thinking of using these functions, but skipped for simplicity for now
# XXX nope. the output from JSON file.
elif periph == 'gpio':
#print("GPIO required!")
print ("GPIO is defined as '*' type, meaning i, o and oe needed")
- resources.append(Resource('gpio', 0,
- Subsignal("i", Pins('i0', dir="i", conn=None, assert_width=1)),
- Subsignal("oe", Pins('oe0', dir="o", conn=None, assert_width=1)),
- Subsignal("o", Pins('o0', dir="o", conn=None, assert_width=1))))
+ ios = []
+ for pin in pins:
+ pname = "gpio"+pin[:-1] # strip "*" on end
+ pads = []
+ # urrrr... tristsate and io assume a single pin which is
+ # of course exactly what we don't want in an ASIC: we want
+ # *all three* pins but the damn port is not outputted
+ # as a triplet, it's a single Record named "io". sigh.
+ # therefore the only way to get a triplet of i/o/oe
+ # is to *actually* create explicit triple pins
+ pads.append(Subsignal("i",
+ Pins(pname+"_i", dir="i", assert_width=1)))
+ pads.append(Subsignal("o",
+ Pins(pname+"_o", dir="o", assert_width=1)))
+ pads.append(Subsignal("oe",
+ Pins(pname+"_oe", dir="oe", assert_width=1)))
+ ios.append(Resource.family(pname, 0, default_name=pname,
+ ios=pads))
+ resources.append(Resource.family(periph, 0, default_name="gpio",
+ ios=ios))
+
+ # add clock and reset
+ clk = Resource("clk", 0, Pins("sys_clk", dir="i"))
+ rst = Resource("rst", 0, Pins("sys_rst", dir="i"))
+ resources.append(clk)
+ resources.append(rst)
return resources
def elaborate(self, platform):
m = Module()
count = Signal(5)
- m.d.comb += count.eq(5)
+ m.d.sync += count.eq(5)
+ print ("resources", platform.resources.items())
+ gpio = platform.request("gpio", 0)
+ print (gpio, gpio.layout, gpio.fields)
+ # get the GPIO bank, mess about with some of the pins
+ m.d.comb += gpio.gpio0.o.eq(1)
+ m.d.comb += gpio.gpio1.o.eq(gpio.gpio2.i)
+ m.d.comb += gpio.gpio1.oe.eq(count[4])
+ m.d.sync += count[0].eq(gpio.gpio1.i)
+ # get the UART resource, mess with the output tx
+ uart = platform.request("uart", 0)
+ print (uart, uart.fields)
+ m.d.comb += uart.tx.eq(1)
return m
# TODO: investigate how the heck to get it to output ilang. or verilog.
# or, anything, really. but at least it doesn't barf
class DummyPlatform(TemplatedPlatform):
- resources = []
connectors = []
+ resources = OrderedDict()
required_tools = []
command_templates = ['/bin/true']
file_templates = {
""",
}
toolchain = None
+ default_clk = "clk" # should be picked up / overridden by platform sys.clk
+ default_rst = "rst" # should be picked up / overridden by platform sys.rst
def __init__(self, resources):
- self.resources = resources
super().__init__()
+ self.add_resources(resources)
+
+ # XXX these aren't strictly necessary right now but the next
+ # phase is to add JTAG Boundary Scan so it maaay be worth adding?
+ # at least for the print statements
+ def get_input(self, pin, port, attrs, invert):
+ self._check_feature("single-ended input", pin, attrs,
+ valid_xdrs=(0,), valid_attrs=None)
+
+ print (" get_input", pin, "port", port, port.layout)
+ m = Module()
+ m.d.comb += pin.i.eq(self._invert_if(invert, port))
+ return m
+
+ def get_output(self, pin, port, attrs, invert):
+ self._check_feature("single-ended output", pin, attrs,
+ valid_xdrs=(0,), valid_attrs=None)
+
+ print (" get_output", pin, "port", port, port.layout)
+ m = Module()
+ m.d.comb += port.eq(self._invert_if(invert, pin.o))
+ return m
+
+ def get_tristate(self, pin, port, attrs, invert):
+ self._check_feature("single-ended tristate", pin, attrs,
+ valid_xdrs=(0,), valid_attrs=None)
+
+ m = Module()
+ m.submodules += Instance("$tribuf",
+ p_WIDTH=pin.width,
+ i_EN=pin.oe,
+ i_A=self._invert_if(invert, pin.o),
+ o_Y=port,
+ )
+ return m
+
+ def get_input_output(self, pin, port, attrs, invert):
+ self._check_feature("single-ended input/output", pin, attrs,
+ valid_xdrs=(0,), valid_attrs=None)
+ print (" get_input_output", pin, "port", port, port.layout)
+ m = Module()
+ m.submodules += Instance("$tribuf",
+ p_WIDTH=pin.width,
+ i_EN=pin.oe,
+ i_A=self._invert_if(invert, pin.o),
+ o_Y=port,
+ )
+ m.d.comb += pin.i.eq(self._invert_if(invert, port))
+ return m
+
"""
and to create a Platform instance with that list, and build
print(pinset)
print(resources)
p = DummyPlatform (resources)
-p.resources = create_resources(pinset)
p.build(Blinker())
projects / pinmux.git / blobdiff