Merge branch 'master' of libre-riscv.org:/pinmux

[pinmux.git] / src / test_bsv / tests / test_pinmux.py

diff --git a/src/test_bsv/tests/test_pinmux.py b/src/test_bsv/tests/test_pinmux.py
index 3a2fec1af35347efbbf2e5a0c24a5c68e366a17a..08761de7cf25cfbca6e58e0f656ebc3399797543 100644 (file)
--- a/src/test_bsv/tests/test_pinmux.py
+++ b/src/test_bsv/tests/test_pinmux.py
@@ -305,7 +305,7 @@ def pinmux_twi_sda2(dut):
 
     # ok now set up gpioa0, set it to the opposite of twi_sda (0) i.e. gpioa0=1
     # and test that... then switch over pin0/mux=3
-    dut.peripheral_side_gpioa_a0_outen_in = 0 # settings for input
+    dut.peripheral_side_gpioa_a0_outen_in = 0  # settings for input
     dut.mux_lines_cell0_mux_in = 0
     dut.EN_mux_lines_cell0_mux = 1
     dut.iocell_side_io0_cell_in_in = 1  # twi_sda=0, so gpioa0 should be 1
@@ -370,6 +370,7 @@ def pinmux_twi_sda2(dut):
 
     dut._log.info("Ok!, twi_sda test2 passed")
 
+
 @cocotb.test()
 def pinmux_twi_sda3(dut):
     """Test for I2C multi-pin one FN_out (route 2 pins out to same function)
@@ -384,7 +385,7 @@ def pinmux_twi_sda3(dut):
     dut.EN_mux_lines_cell2_mux = 0
 
     # first check the working of twi_sda at cell1
-    
+
     # TWI
     yield Timer(2)
     # define input variables
@@ -392,7 +393,7 @@ def pinmux_twi_sda3(dut):
     dut.peripheral_side_twi_sda_outen_in = 1
 
     yield Timer(2)
-    # the output passed by twi_sda = 0 should be passed 
+    # the output passed by twi_sda = 0 should be passed
     # to io1_cell__out
     dut._log.info("io1_out %s" % dut.iocell_side_io1_cell_out)
     # Test for out for twi_sda
@@ -400,7 +401,7 @@ def pinmux_twi_sda3(dut):
         raise TestFailure(
             "twi_sda=0/mux=2/out=1 %s iocell_io1 != 0" %
             str(dut.iocell_side_io1_cell_out))
-    
+
     dut.peripheral_side_twi_sda_out_in = 1
     yield Timer(2)
     # ok, now io1_cell_out should be equal to 1
@@ -415,7 +416,7 @@ def pinmux_twi_sda3(dut):
     dut.mux_lines_cell0_mux_in = 3
     dut.EN_mux_lines_cell0_mux = 1
     yield Timer(2)
-    # ok, now the output io0_cell_out should be 1 as 
+    # ok, now the output io0_cell_out should be 1 as
     # FNout remains is not changed
     # this also tests the working of twi_sda at cell0
 
@@ -426,7 +427,7 @@ def pinmux_twi_sda3(dut):
 
     # Now, let's test the working of output muxing logic
     # at cell 0, by enabling the mux selection line for
-    # gpio 0. The io0_cell_out should change, but 
+    # gpio 0. The io0_cell_out should change, but
     # twi_sda should remain at value 1
     # so set value of gpio0_out_in  = 0
 
@@ -448,16 +449,16 @@ def pinmux_twi_sda3(dut):
             "twi_sda=0/mux=0/out=1 %s iocell_io0 != 0" %
             str(dut.iocell_side_io2_cell_out))
 
-    # Now, let's test the working of output muxing logic 
-    # at cell1. First, the output of io1_cell_out should 
-    # be the previous value (1). 
+    # Now, let's test the working of output muxing logic
+    # at cell1. First, the output of io1_cell_out should
+    # be the previous value (1).
 
     yield Timer(2)
     if dut.iocell_side_io1_cell_out != 1:
         raise TestFailure(
             "twi_sda=1/mux=2/out=1 %s iocell_io1 != 1" %
             str(dut.iocell_side_io1_cell_out))
-   
+
     # ok, now set the muxing selection line for gpio1
     # again, the value of gpio_out_in should be 0
     # ie. opposite of twi_sda_out